
2
Schematic Checklist
• power-on-reset
• RTC watchdog reset
• brownout reset
• analog super watchdog reset
• crystal clock glitch detection reset
By default, GPIO9 is connected to the internal pull-up resistor. If GPIO9 is not connected or connected to an
external high-impedance circuit, the latched bit value will be ”1”
To change the strapping bit values, you can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-C3 family.
After reset, the strapping pins work as normal-function pins.
Refer to Table
for a detailed boot-mode configuration of the strapping pins.
Table 2: Strapping Pins
Booting Mode
1
Pin
Default
SPI Boot
Download Boot
GPIO2
N/A
1
1
GPIO8
N/A
Don’t care
1
GPIO9
Internal pull-up
1
0
Enabling/Disabling ROM Code Print During Booting
Pin
Default
Functionality
GPIO8
N/A
When the value of eFuse field EFUSE_UART_PRINT_CONTROL is
0 (default), print is enabled and not controlled by GPIO8.
1, if GPIO8 is 0, print is enabled; if GPIO8 is 1, it is disabled.
2, if GPIO8 is 0, print is disabled; if GPIO8 is 1, it is enabled.
3, print is disabled and not controlled by GPIO8.
1
The strapping combination of GPIO8 = 0 and GPIO9 = 0 is invalid and will trigger unexpected behavior.
Figure
shows the setup and hold times for the strapping pin before and after the CHIP_EN signal goes high.
Details about the parameters are listed in Table
Espressif Systems
12
ESP32-C3 Family Hardware Design Guidelines V1.0