Technical Description
12
Seiko Epson Corporation
S5U13517P00C100 Evaluation Board
Rev. 1.1
4.4 Host Interface
4.4.1 Direct Host Bus Interface Support
All S1D13517 host interface pins are available on connector CN1 which allows the S5U13517P00C100 evaluation
board to be connected to a variety of development platforms.
The following figure shows the location of host bus connector CN1. CN1 is a 0.1x0.1 inch 34-pin header (17x2).
Figure 4-2: Host Bus Connector Location (CN1)
For the pinout of connector CN1, see Chapter 6, “Schematic Diagrams” on page 18.
CN1