Epson RX-8581JE Скачать руководство пользователя страница 28 | Manualshive

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RX

-

8581

SA

/

JE

/

NB

Page - 25

MQ372-02

8.7. Backup and Recovery

V

DD

t

F

t

R2

Back up

t

R1

V

CLK

0 V

Item

Symbol

Min.

Typ.

Max.

Power supply drop time

t

F

2

µ

s /V

Initial power-up time

t

R1

1

µ

s /V

10

ms /V

Clock maintenance power-up time

t

R2

1

µ

s /V

8.8. Connection with Typical Microcontroller

Device

SCL

SDA

GND

V

DD

V

DD

SCL

SDA

t

r

R =

C

BUS

Pull up resistor

RX

-

8581

SCL

SDA

GND

V

DD

SLAVE ADRS = 1010

001

∗

I

2

C-BUS

I

2

C-BUS

master

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Содержание RX-8581JE

Страница 1: ...MQ372 02 Application Manual Real Time Clock Module RX 8581SA JE NB Model Product Number RX 8581SA Q4185815xxxxx00 RX 8581JE Q4185817xxxxx00 RX 8581NB Q4185819xxxxx00 ...

Страница 2: ...cence from the Ministry of International Trade and industry or other approval from another government agency The products except for some product for automotive applications listed up on this material are designed to be used with ordinary electronic equipment OA equipment AV equipment communications equipment measuring instruments etc Seiko Epson does not assume any liability for the case using th...

Страница 3: ...3 7 2 AC Characteristics 4 8 Use Methods 5 8 1 Overview of Functions 5 8 2 Description of Registers 6 8 3 Fixed cycle Timer Interrupt Function 13 8 4 Time Update Interrupt Function 16 8 5 Alarm Interrupt Function 18 8 6 Reading Writing Data via the I2C Bus Interface 21 8 7 Backup and Recovery 25 8 8 Connection with Typical Microcontroller 25 9 External Dimensions Marking Layout 26 10 Reference Dat...

Страница 4: ... is an I 2 C bus interface compliant real time clock which includes a 32 768 kHz crystal oscillator In addition to providing a calendar year month date day hour minute second function and a clock counter function this module provides an abundance of other functions including an alarm function fixed cycle timer function time update interrupt function and 32 768 kHz output function The devices in th...

Страница 5: ...s an N ch open drain pin during output be sure to connect a suitable pull up resistance relative to the signal line capacity FOUT O This is the C MOS output pin with output control provided via the FOE pin When FOE H high level this pin outputs a 32 768 kHz signal When output is stopped the FOUT pin L low level FOE I This is an input pin used to control the output mode of the FOUT pin When this pi...

Страница 6: ...1 minutes excluding offset value 7 Electrical Characteristics 7 1 DC characteristics Unless otherwise specified GND 0 V VDD 1 8 V to 5 5 V Ta 40 C to 85 C Item Symbol Condition Min Typ Max Unit Current consumption 1 IDD1 VDD 5 V 0 65 1 2 Current consumption 2 IDD2 fSCL 0 Hz INT VDD FOE GND FOUT output OFF low level VDD 3 V 0 45 0 8 µA Current consumption 3 IDD3 VDD 5 V 3 0 7 5 Current consumption ...

Страница 7: ...H 0 6 µs Rise time for SCL and SDA tr 0 3 µs Fall time for SCL and SDA tf 0 3 µs Allowable spike time on bus tSP 50 ns FOUT duty tW t VDD 2 4 V 5 5 V 50 of VDD level 45 50 55 Timing chart tHD DAT tSU DAT tHD STA tLOW tHIGH 1 fSCL tr tf tSU STA SDA SCL START CONDITION S BIT 7 MSB A7 BIT 6 A6 ACK A Protocol tBUF tSU STO STOP CONDITION P START CONDITION S P A tHD STA tSU STA S BIT 0 LSB R W S tSP Cau...

Страница 8: ...s occurred However when a fixed cycle timer interrupt event has been generated low level output from the INT pin occurs only when the value of the control register s UIE bit is 1 This INT status is automatically cleared INT status changes from low level to Hi Z 7 8 ms a fixed value after the interrupt occurs For details see 8 4 Time Update Interrupt Function 4 Alarm interrupt function The alarm in...

Страница 9: ... 2 3 F Control Register UIE TIE AIE STOP RESET 3 Note When after the initial power up or when the result of read out the VLF bit is 1 initialize all registers before using the module Be sure to avoid entering incorrect date and time data as clock operations are not guaranteed when the data or time data is incorrect 1 During the initial power up the TEST bit is reset to 0 and the VLF bit is set to ...

Страница 10: ...rated when an interrupt event occurs TIE Data Function 0 When a fixed cycle timer interrupt event occurs an interrupt signal is not generated or is canceled INT status changes from low to Hi Z Write Read 1 When a fixed cycle timer interrupt event occurs an interrupt signal is generated INT status changes from Hi Z to low When a fixed cycle timer interrupt event has been generated low level output ...

Страница 11: ... operations It also resets the RTC module s internal counter value when the value is less than one second Writing a 1 to this bit stops the counter operation and resets the RTC module s internal counter value when the value is less than one second Writing a 0 to this bit cancels stop status for restarts these operations If a STOP condition or repeated START condition is received while the 0 95 sec...

Страница 12: ...le timer interrupt event has occurred Once this flag bit s value is 1 its value is retained until a 0 is written to it For details see 8 3 Fixed cycle Timer Interrupt Function 3 AF Alarm Flag bit If set to 0 beforehand this flag bit s value changes from 0 to 1 when an alarm interrupt event has occurred Once this flag bit s value is 1 its value is retained until a 0 is written to it For details see...

Страница 13: ...terrupt function For details see 8 5 Alarm Interrupt Function 3 USEL Update Interrupt Select bit This bit is used to specify either second update or minute update as the update generation timing of the time update interrupt function Writing a 1 to this bit specifies the internal clock s minute update once per minute operation as the timing by which time update interrupts are generated Writing a 0 ...

Страница 14: ... 00 to 01 02 and up to 59 minutes after which it starts again from 00 minutes 3 Hour counter Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 2 HOUR 20 10 8 4 2 1 This hour counter counts from 00 hours to 01 02 and up to 23 hours after which it starts again from 00 hours 8 2 7 Day counter Reg 3 Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 WEEK 6 5 4 3 2 1 0 o ...

Страница 15: ...1 January 3 Year counter Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 6 Years Y80 Y40 Y20 Y10 Y8 Y4 Y2 Y1 The year counter counts from 00 01 02 and up to 99 then starts again at 00 Any year that is a multiple of four 04 08 12 88 92 96 etc is handled as a leap year 8 2 9 Alarm registers Reg 8 A Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 8 MIN Alarm AE 40 20...

Страница 16: ...ixed cycle timer stops 1 1 2 001 h 000 h 3 4 5 1 6 7 7 7 8 9 1 When a 1 is written to the TE bit the fixed cycle timer countdown starts from the preset value 2 A fixed cycle timer interrupt event starts a countdown based on the countdown period source clock When the count value changes from 001h to 000h an interrupt event occurs After the interrupt event that occurs when the count value changes fr...

Страница 17: ...g to the source clock setting 2 When the source clock has been set to second update or minute update the timing of both countdown and interrupts is coordinated with the clock update timing 2 Fixed cycle Timer Control register Reg B C This register is used to set the default preset value for the counter Any count value from 1 001 h to 4095 FFFh can be set The counter counts down based on the source...

Страница 18: ...i Z 8 3 3 Fixed cycle timer interrupt interval example Source clock Timer Counter setting 4096 Hz TSEL1 0 0 0 64 Hz TSEL1 0 0 1 Second update TSEL1 0 1 0 Minute update TSEL1 0 1 1 0 1 244 14 µs 15 625 ms 1 s 1 min 2 488 28 µs 31 25 ms 2 s 2 min 41 10 010 ms 640 63 ms 41 s 41 min 205 50 049 ms 3 203 s 205 s 205 min 410 100 10 ms 6 406 s 410 s 410 min 2048 500 00 ms 32 000 s 2048 s 2048 min 4095 0 9...

Страница 19: ...leared to zero Operation in RTC i i Write operation 1 2 3 4 1 5 6 7 1 A time update interrupt event occurs when the internal clock s value matches either the second update time or the minute update time The USEL bit s specification determines whether it is the second update time or the minute update time that must be matched 2 When a time update interrupt event occurs the UF bit value becomes 1 3 ...

Страница 20: ...1 when a time update interrupt event occurs When this flag bit 1 its value is retained until a 0 is written to it UF Data Description 0 The UF bit is cleared to zero to prepare for the next status detection Clearing this bit to zero does not enable the INT low output status to be cleared to Hi Z Write 1 This bit is invalid after a 1 has been written to it 0 Time update interrupt events are not det...

Страница 21: ...time is used as the setting the alarm will not occur until the counter counts up to the current date time i e an alarm will occur next time not immediately 2 When a time update interrupt event occurs the AF bit values becomes 1 3 When the AF bit 1 its value is retained until it is cleared to zero 4 If AIE 1 when an alarm interrupt occurs the INT pin output goes low When an alarm interrupt event oc...

Страница 22: ...to specify either WEEK or DAY as the target for alarm interrupt events WADA Data Description 0 Sets WEEK as target of alarm function DAY setting is ignored Write Read 1 Sets DAY as target of alarm function WEEK setting is ignored 2 Alarm registers Reg 8 to A Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 8 MIN Alarm AE 40 20 10 8 4 2 1 9 HOUR Alarm AE 20 10 8 4 2 1 WEEK Alarm 6 5...

Страница 23: ...the AIE bit value is 0 another interrupt event may change the INT status to low or may hold INT L Write Read 1 When an alarm interrupt event occurs an interrupt signal is generated INT status changes from Hi Z to low When an alarm interrupt event occurs low level output from the INT pin occurs only when the AIE bit value is 1 This value is retained not automatically cleared until the AF bit is cle...

Страница 24: ...n its slave address matches the slave address in the received data In either case the data is transferred via the SCL line at a rate of one bit per clock pulse 8 6 2 System configuration All ports connected to the I 2 C bus must be either open drain or open collector ports in order to enable AND connections to multiple devices SCL and SDA are both connected to the VDD line via a pull up resistance...

Страница 25: ...topped at any time while in progress However this is only when this RTC module is in receiver mode data reception mode SDA released 3 When communicating with this RTC module the series of operations from transmitting the START condition to transmitting the STOP condition should occur within 0 95 seconds A RESTART condition may be sent between a START condition and STOP condition but even in such c...

Страница 26: ... pulse corresponding to the 8th bit of data on the SCL line the transmitter releases the SDA line and the receiver sets the SDA line to low acknowledge level SCL from Master SDA from transmitter sending side ACK signal 1 2 8 9 SDA from receiver receiving side Release SDA Low active After transmitting the ACK signal if the Master remains the receiver for transfer of the next byte the SDA is release...

Страница 27: ...8581 6 CPU transfers RESTART condition Sr in which case CPU does not transfer a STOP condition P 7 CPU transfers RX 8581 s slave address with the R W bit set to read mode 8 Check for ACK signal from RX 8581 from this point on the CPU is the receiver and the RX 8581 is the transmitter 9 Data from address specified at 4 above is output by the RX 8581 10 CPU transfers ACK signal to RX 8581 11 Repeat ...

Страница 28: ...Min Typ Max Power supply drop time t F 2 µs V Initial power up time t R1 1 µs V 10 ms V Clock maintenance power up time t R2 1 µs V 8 8 Connection with Typical Microcontroller Device SCL SDA GND VDD VDD SCL SDA tr R CBUS Pull up resistor RX 8581 SCL SDA GND VDD SLAVE ADRS 1010 001 I2 C BUS I2 C BUS master ...

Страница 29: ...m 1 5 3 8 1 5 0 65 9 5 85 0 3 0 35 0 65 5 4 7 0 0 3 1 20 11 10 R8581 E 1234A The crystal oscillator s metal case may be visible in the area on front and top indicated in broken lines but this has no effect on the device s characteristics RX 8581 NB SON 22 pin External dimensions Soldering pattern 1 3 0 1 0 125 0 1 Unit mm 6 3 Max 5 0 0 2 4 8 0 5 0 2 1 22 14 11 14 0 3 11 1 22 0 8 P 0 5 10 5 0 1 4 0...

Страница 30: ...find the date difference Date difference f f 86400 seconds For example f f 11 574 10 6 is an error of approximately 1 second day 1 Example of frequency and temperature characteristics 150 100 50 0 50 0 50 100 Temperature C Frequency f T 10 6 θT 25 C Typ α 0 035 10 6 Typ 2 Example of frequency and voltage characteristics 3 2 Frequency f v 10 6 3 0 3 4 5 Condition 3 V as reference Ta 25 C Supply Vol...

Страница 31: ...r pull down resistors should be provided for all unused input pins 11 2 Notes on packaging 1 Soldering heat resistance If the temperature within the package exceeds 260 C the characteristics of the crystal oscillator will be degraded and it may be damaged The reflow conditions within our reflow profile is recommended Therefore always check the mounting temperature and time before mounting this dev...

Страница 32: ...Les Conquérants 1 Avenue de l Atlantique Z A de Courtaboeuf 2 91976 Les Ulis Cedex France Phone 33 0 1 64862350 Fax 33 0 1 64862355 ASIA EPSON CHINA CO LTD 23F Beijing Silver Tower 2 North RD DongSangHuan ChaoYang District Beijing China Phone 86 10 6410 6655 Fax 86 10 6410 7319 http www epson com cn 4F Bldg 27 No 69 Gui Qing Road Cao hejing Shanghai China Phone 86 21 6485 0835 Fax 86 21 6485 0775 ...

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