EPOX EP-MVP4F, Руководство пользователя

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BIOS EP-MVP4F
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Sustained 3T Write: This item allow you to enable or disable direct map write
back / write through secondary cache.
The Choice: Enabled, Disabled.
Cache R/CPU W Pipeline: This item allows you to enable/disabled the cache
timing.
The Choice: Enabled, Disabled.
Video BIOS Cacheable: When enabled. The Video BIOS cache will cause access
to video BIOS addressed at C0000H to C7FFFH to be cached, if the cache
controller is also enabled
The Choice: Enabled, Disabled.
System BIOS Cacheable: As with caching the Video BIOS above, enabling this
selection allows accesses to the system BIOS ROM addressed at F0000H-
FFFFFH to be cached, provided that the cache controller is enabled.
The Choice: Enabled, Disabled.
Memory Hole: You can reserve this memory area for the use of ISA adaptor
ROMs. The default is Disabled.
Enabled: This field enables the main memory (15~16MB) to remap to ISA BUS.
Disabled: Normal Setting.
Note: If this feature is enabled you will not be able to cache this memory
segment.
Init Display First: If two video cards are used (1 AGP and 1 PCI) this specifies
which one will be the primary display adapter.
The default is PCI Slot.
PCI Slots: PCI video card will be primary adapter.
AGP: AGP video card will be primary adapter.
AGP Aperture Size: The amount of system memory that the AGP card is allowed
to share. The default is 64.
4: 4MB of systems memory accessable by the AGP card.
8: 8MB of systems memory accessable by the AGP card.
16: 16MB of systems memory accessable by the AGP card.