6.1.2 IIS Configuration
The following tables show the pin configurations for IIS Bus on module's connector.
IIS1 bus interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
63 / 155
CSI_DATA06 / LCD_DATA03
I2S_DIN
+3,3V
73 / 154
CSI_DATA07 / LCD_DATA04
I2S_DOUT
+3,3V
68 / 157
CSI_DATA05 / LCD_DATA02
I2S_SCLK
+3,3V
171 / 159
CSI_DATA01 / LCD_DATA00
I2S_MCLK
+3,3V
72 / 158
CSI_DATA04 / LCD_DATA01
I2S_LRCLK
+3,3V
Table 29
IIS2 bus interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
114 / 185
JTAG_TCK / SD1_DATA2
I2S_DIN
+3,3V
122 / 186
JTAG_TRST_B / SD1_DATA3
I2S_DOUT
+3,3V
124 / 187
JTAG_TDI / SD1_DATA1
I2S_SCLK
+3,3V
34 / 189
JTAG_TMS / SD1_CLK
I2S_MCLK
+3,3V
115 / 188
JTAG_TDO / SD1_DATA0
I2S_LRCLK
+3,3V
Table 30
IIS3 bus interfaces
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
144
LCD_DATA14
I2S_DIN
+3,3V
143 / 62
LCD_DATA15 / LCD_RESET
I2S_DOUT
+3,3V
147
LCD_DATA11
I2S_SCLK
+3,3V
125 / 149
LCD_CLK / LCD_DATA09
I2S_MCLK
+3,3V
146 / 162
LCD_DATA12 / LCD_ENABLE
I2S_LRCLK
+3,3V
Table 31
6.1.3 Alternative PWM pins table
It's possible to set the pins shown in the following table as PWM signals.
Pin number
Pin Name on i.MX
Signal reference
Voltage reference
38 / 159
GPIO1_IO08 / LCD_DATA00
PWM-1
+3,3V
184 /158
GPIO1_IO09 / LCD_DATA01
PWM-2
+3,3V
25 / 157
GPIO1_IO04 / LCD_DATA02
PWM-3
+3,3V
155
LCD_DATA03
PWM-4
+3,3V
15 / 36
LCD_DATA18 / NAND_DQS
PWM-5
+3,3V
124 / 16
JTAG_TDI / LCD_DATA19
PWM-6
+3,3V
169 / / 114
CSI_VSYNC / JTAG_TCK
PWM-7
+3,3V
167 / 132 / 122
CSI_HSYNC / ENET1_RX_ER / JTAG_TRST_B
PWM-8
+3,3V
Table 32
D N :
4 3