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Enfora Enabler IIIG M2M
Modem Integration Guide
Figure 16 - Power Control Signal (using external processor) shows a typical connection from an external
processor to the Enfora Enabler IIIG module, using the external PWR_CTL signal. The Enfora Enabler IIIG can
be powered on by using the PWR_CTL signal, and reset with the RESET signal. When using PWR_CTL, the
I/O or serial lines can be at any voltage state desired. It is recommended that the I/O and serial lines be tri-
stated or set low when the GSM0308 is shutdown for an extended period of time to prevent any leakage current
from the processor to the modem.
Modem
VBAT
PWR_CTL
RESET
Open drain, or Tri-State I/O
CPU
Open drain, or Tri-State I/O
GPIO
SERIAL
Figure 16 - Power Control Signal (using external processor)
Parameter
Parameter/Conditions
MIN
TYP
MAX
UNIT
V
IL
Input Voltage – Low or float
0.3 x V
BAT
Vdc
V
IH
Input Voltage – High
0.7 x V
BAT
1.95
Vdc
I
PU
Internal Pull-Up Resistor
-40
-31
-15
μ
A
I
IL
Current sink
-2.0
mA
ON Pulse Duration
10
50
mS
OFF Pulse Duration
Minimum is programmable
(AT$OFFDLY)
10
100
5000
mS
Boot time
Time to boot from power on
to command prompt
1.1
Sec
GSM0308IG002
40
Version 1.05 – 11/13/08