emCON-MX8MM - Hardware Manual (Rev1)
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The emCON pin GBE1_LED_TRAFFIC# is connected to the LED1 pin of the Ethernet PHY, it indicates
that data is being transferred (
“
blinking
”
= traffic).
The RGMII 125MHz Ethernet clock is generated by the PLL of the Ethernet PHY and routed to the
processor
’
s internal MAC.
The Ethernet Phy can be reset by a
logical “0”
on the GPIO1_IO09 Pin.
4.5
USB Host
A USB Host interface is used to connect USB devices such as a keyboard, mouse, printer or memory
stick.
The USB host interface is realized by the internal host controller of the i.MX8MM. It complies with
the USB specification Rev. 2.0, supporting data transfers at low-speed (1,5Mbps), full-speed (12
Mbps) and high-speed (480Mbps).
To switch the bus power, the control line USBH_PEN# is connected to the emCON connector. A
logical “0” at the processor’s pin
GPIO1_IO14 switches the power on;
a logical “1” turns
the power
off. The signal USBH_OC# reports an overcurrent at the GPIO1_IO15
(“0” = overcurrent).
The data lines and the two control lines are available at the emCON connector. A USB power switch
must be added externally. The data lines are internally terminated by 15-K
pulldown resistors
.
The USBH_VBUS signal on the emCON connector is only an input to detect the VBUS voltage on
the baseboard.
4.6
USB OTG
The USB OTG port can operate in Host or Device mode. The signal USBOTG_ID is used to determine
the mode of the connected device.
The interface is realized by the internal device controller of the i.MX8MM. The interface is USB 2.0
compliant, supporting data transfers at low-speed (1,5Mbps), full-speed (12 Mbps) and high-speed
(480Mbps).
To switch the bus power in USB Host mode the control line USBOTG_PEN# is connected to the
emCON
connector. A logical “0” at the processor GPIO
1_IO12
switches the power on; a logical “1”
turns the power off. The signal USBH_OC# reports an overcurrent at the GPIO1_IO13
(“0” =
overcurrent).
The USBOTG_VBUS signal on the emCON connector is only an input to detect the VBUS voltage on
the baseboard.
