User Manual
Chapter 7
GFK-1503F
Jan 2020
CPU Operation
76
7.5
Controlling the Execution of a Program
The VersaMax CPU Instruction Set contains several powerful Control functions that can be
included in an application program to limit or change the way the CPU executes the
program and scans I/O.
7.5.1
Calling a Subroutine Block
The CALL function can be used to cause program execution to go to a specific subroutine.
Conditional logic placed before the Call function controls the circumstances under which
the CPU performs the subroutine logic. After the subroutine is finished, program execution
resumes at the point in the logic directly after the CALL instruction.
7.5.2
Creating a Temporary End of Logic
The END function can be used to provide a temporary end of logic. It can be placed
anywhere in a program. No logic beyond the END function is executed, and program
execution goes directly back to the beginning. This ability makes the END function useful
for debugging a program.
The END function should not be placed in logic associated with or called by a Sequential
Function Chart control structure. If this occurs, the PLC will be placed in STOP/FAULT mode
at the end of the current sweep and an SFC_END fault will be logged.
7.5.3
Executing Rungs of Logic without Logical Power Flow
The nested Master Control Relay can be used to execute a portion of the program logic with
no logical power flow. Logic is executed in a forward direction and coils in that part of the
program are executed with negative power flow. Master Control Relay functions can be
nested to 8 levels deep.
7.5.4
Jumping to Another Part of the Program
The Jump function can be used to cause program execution to move either forward or
backward in the logic. When a nested Jump function is active, the coils in the part of the
program that is skipped are left in their previous states (not executed with negative power
flow, as they are with a Master Control Relay). Jump functions can also be nested.
Jumps cannot span blocks, SFC actions, SFC transitions, or SFC pre- or post-processing logic.
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