EMC Symmetrix DMX-3, Руководство по эксплуатации продукта

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Channel, disk, and global memory directors 83
Symmetrix DMX-3 Hardware
Fibre Channel disk
directors
(back-end) The Symmetrix DMX-3 Fibre Channel back-end disk directors
manage the interface to the disk drives, and are responsible for data
movement between the disk drives s and global memory. Each disk
director on a Symmetrix DMX system supports eight internal links to
global memory.
The Symmetrix DMX-3 features a 2 Gb/s Fibre Channel back-end
infrastructure. The Fibre Channel disk director has eight multiplex
processors that support one port each on its back adapter.
The Symmetrix DMX-3 is available with two, four, six, or eight disk
directors, supporting Fibre Channel loops ranging from 15 drives to
60 drives per loop.
Note: For information on maximum logical volumes supported on each
Symmetrix DMX physical disk drive and the maximum logical volumes
supported for each Symmetrix DMX model, refer to
“Symmetrix DMX-3
logical volume capacities” on page 66 .
Global memory
directors The Symmetrix DMX-3 global memory director technology is one of
the most crucial components of a Symmetrix system. The DMX-3 uses
global memory directors that use industry-standard Double Data
Rate Synchronous Dynamic Random-Access Memory (DDR
SDRAM), the latest generation of DDR SDRAM chip technology.
All read and write operations transfer data to or from global memory.
Any transfers between the host processor, channel directors, and
global memory directors are achieved at much greater electronic
speeds than transfers involving disks. The DMX-3 global memory
directors work in pairs. The hardware writes to the primary global
memory director first, and then automatically writes data to the
secondary global memory director. All reads are from the primary
memory director. Upon a primary or secondary global memory
director failure, all directors drop the failed global memory director
and switch to a nondual write mode. Striping between global
memory directors is default.
Each Symmetrix DMX-3 global memory director accommodates four
separately addressable, simultaneously accessible memory regions,
which greatly reduces the probability of contention for global
memory access.