EMAC MicroPac 535, Справочник по аппаратуре

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application revision is downloaded into Flash through a Flash resident bootloader, but the downloaded application itself doesn't need to
write to Flash, changing JP 2 to the Flash WR protect setting will help prevent a crashing program from inadvertently writing to Flash.
Both Flash configuration settings, however, require different serial EEPROM driver software than that used on Rev. 0,1 because these
settings change the way P5.3 and P5.4 connect to the serial EEPROM (Serial EEPROM is discussed later).
The only way to write to the Flash is to allow the 80535 to access it as data memory instead of program memory, since program memory is
read only. This is made possible when JP2 is in the Flash RD/WR setting. In this setting, P5.4 is used to exchange the memory spaces of
the RAM device with the Flash device as shown below:
Program memory space (read only with MOVC) Data memory space (read/writable with
MOVX)
P5.4=1 Flash RAM
P5.4=0 RAM Flash
Any Flash resident subroutine that manipulates P5.4 must have a duplicate in the RAM addresses that will become program memory
when P5.4 is changed. This is done by adding code to the program initialization which will copy the subroutine from Flash to RAM. Flash
can only be written to by code running in RAM.
In-circuit writing to a 64K Flash with a 32K RAM installed requires the following:
Reset and interrupt vectors and low-level startup code which copies all Flash related code to RAM.
A subroutine for writing to the Flash which first clears the P5.4 line and sets P5.1 (disables MMIO) before writing.
The low-level code, Flash subroutines and the application must be programmed into the Flash with an external EPROM/FLASH
device programmer.
In-circuit writing to a 128K Flash with a 32K RAM installed requires the same as the previous with the following exceptions:
The Flash write subroutine must also control the A16 line (P5.0) after P5.4 is cleared and before writing to the Flash.
The low-level code and subroutines must be programmed into the Flash starting at 1:0000, instead of 0:0000.
In-circuit writing to a 128K Flash with a 128K RAM installed requires the same as the previous with the following exceptions:
The subroutine which copies code from the Flash to the RAM space must be executed with A16=0 and again with A16=1.
The low-level code and subroutines must be programmed into the Flash starting at 0:0000, as well as 1:0000.
When designing the Flash write subroutines there are several things to keep in mind:
The subroutine which copies the low level code and subroutines to RAM must be called (twice, in the configuration with 128K
Flash and 128K RAM) before calling a Flash write routine, since there must be code in the RAM space before manipulating P5.4.
Different Flash devices have different programming algorithms and methods for software write protection. This may involve
sector protect options, and/or program commands that the Flash recognizes.
Be aware that most devices require erasing an entire sector in order to change one byte. This requires the software to copy the
sector to RAM, change the desired byte in RAM, then exchange banks, erase the sector, write back the RAM copy and finally
exchange back the original memory bank setting.
Some Flash devices have the capability to write protect/erase protect sectors of memory when programmed using an external
EPROM/FLASH device programmer. This feature should be used to protect the application section(s) of the Flash.
SERIAL EEPROM
This non-volatile memory is not part of the memory map and is intended to be used to hold configuration information and other data that
doesn't change often, since the device is rated for only 10,000 write cycles. The memory is organized as 64X16 bits and all access is done
serially through P5. Since P5.1 is used to select the SEEPROM and also to enable/disable memory mapped I/O, interrupts should be
disabled around SEEPROM routines if there is a possibility of an interrupt handler affecting P5.1. The
setting of JP 2 affects the way the SEEPROM is controlled so it requires that the drivers change depending of the setting. See the
assembly language drivers included on the distribution disk for more information.