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EKOSync 1588A User Manual rev 1.1
August 2021
IEEE 1588 / PTP / C37.238
The IEEE 1588 precision time protocol (PTP) provides a standard method to synchronize devices with
sub microsecond precision over a local area network (LAN) [6]. The protocol synchronizes slave clocks
to a master clock ensuring that events and timestamps in all devices use the same time base. IEEE 1588A
protocol uses the Best Master Clock algorithm to automatically determine which clock in the network is
the most precise. It becomes the master clock that is a GPS disciplined time reference. All other clocks
become slaves (e.g. a IEDs) and synchronize their clocks with the master. IEEE 1588 defines one-step
and two-step clock operations. One-step clock updates accurate timestamp in synch message but two-
step clock sends accurate timestamp in a follow up message. One step clock is recommended to use
because this eliminates the need to read the transmit timestamp over MDIO and also eliminates the
need to send a follow up message. Figure 1 shows an one step clock synchronization. The
synchronization of the clocks is achieved using a series of message packets between master and slaves.
There are three message types - Sync, Delay Request and Delay Response.
One-step clock synchronization
The master stamps the time (t1) on the Sync message that leaves the master. The message arrives
at slave clock at t2 and sends a Delay-Req message at time (t3) to the master, which is received
by the master clock at a later time, t4. The master then sends a packet containing t4 to the slave.
The slave has all the information needed to calculate the slave offset. In this way the slave use
this equations [t2 = t1 + delay + slaveoffset (1) and t4 = t3 + delay + slaveoffset (2)] to obtain
following equation:
Slaveoffset = [(t4-t3) – (t2-t1)] / 2 (3)
Now, using this equation the slave arranges its time clock. This equation (3) can be only used if
the delays are equal to each other between t1 to t2 delay and t3 to t4 delay.
This measurement is repeated every second between the master clock and the slave clock and the
synchronization accuracy can be reduced to approximately 100 ns.
