ECS 945GCT-M3, Руководство пользователя, Страница: 43 / 60

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Using BIOS
System BIOS Cacheable (Disabled)
This item allows the system to be cached in memory for faster execution. Enable this
item for better performance.
Video BIOS Cacheable (Disabled)
The item allows the video BIOS to be cached in memory for faster execution.
PEG/Onchip VGA Control (Auto)
This item allows you to choose the primary display card.
PEG Force X1 (Disabled)
This item is used to select PCI Express X1 forcedly.
On-chip Frame Buffer Size (8 MB)
This allows you to set the VGA frame buffer size.
DVMT Mode (DVMT)
DVMT is Dynamic Video Memory Technology. This item helps you select video
mode.
DVMT/FIXED Memory Size (128 MB)
DVMT is Dynamic Video Memory Technology; this item allows you to select a
maximum size of dynamic amount usage of video memory. The system would config-
ure the video memory depends on your application.
Boot Display (Auto)
This item is for Intel define ADD card only.
DRAM RAS# to CAS# Delay (Auto)
This field allows you insert a timing delay between the CAS and RAS strobe signals,
used when DRAM is written to, read from, or refreshed. Disabled gives faster perfor-
mance; and Enabled gives more stable performance.
DRAM RAS# Precharge (Auto)
Select the number of CPU clocks allocated for the Row Address Strobe (RAS#) signal
to accumulate its charge before the DRAM is refreshed. If insufficient time is al-
lowed, refresh may be incomplete and data lost.
Precharge delay (tRAS)
The precharge time is the number of cycles it takes for DRAM to accumulate its
charge before refresh.
System Memory Frequency (Auto)
This item sets the main memory frequency. When you use an external graphics card,
you can adjust this to enable the best performance for your system.
SLP_S4# Assertion Width (1 to 2 Sec.)
CAS Latency Time (Auto)
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing. Do not reset this field from the default value specified
by the system designer.
This item allows you to set the SLP_S4# Assertion Width manually.