U
SER
M
ANUAL
16
K
/8
K
CXP
M
ONO
–
R
EV
K
–
06/2017
P
A G E
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39
7.7
Flat Field Correction
Feature
CXP @
Size
in
bytes
R/W Description
FFCEnable
0x08800
4
RW
0
: Disable Flat Field Correction (“False”)
- In user/integrator mode : the factory FFC bank is written
into the FPGA and the FFC stays enabled
1
: Enable Flat Field Correction (“True”)
FPNReset
0x08804
4
WO
0
: Reset FPN coefficients
PRNUReset
0x08808
4
WO
0
: Reset PRNU coefficients
FPNValueAll
0x10000
32K
RW Memory containing FPN
Format: 9bits signed coded on 16bits each
Value S9.1 => -256..+255.5 step ½
Size=CCDSize*2
FPNValueSize
Xml
2
RO
Integer providing FPN value size in byte
PRNUValueAll
0x20000
32K
RW Memory containing PRNU
Format: 12bits unsigned coded on 16bits each
value : U.2.12 => 0-4095 : (1+Value/1024) => x1..x4.999 by
step of 1/1024
Size=CCDSize*2
PRNUValueSize
Xml
2
RO
Integer providing PRNU value size in byte
FFCCalibrationCtrl
0x0880C
4
RW FFC calibration
- In Read Mode:
0
= finished
1
= running
- In Write Mode:
0
= Abort PRNU calibration by setting it to “Off” (no
effect if already stopped)
1
= Launch PRNU calibration by setting it to “Once” (no
effect if already launched)
FPNCalibrationCtrl
0x08810
4
RW FPN calibration
- In Read Mode:
0
= finished
1
= running
- In Write Mode:
0
= Abort FPN calibration by setting it to “Off” (no effect
if already stopped)
1
= Launch FPN calibration by setting it to “Once” (no
effect if already launched)
FFCAdjust
0x08814
4
RW
0
: Disable ffc adjust
1
: Enable ffc adjust
FFCAutoTargetLevel
0x08818
4
RW Set FFC target adjust level, from 0 to 4095, step 1
FFCGainAdjust
0x0881C
4
RW FFC Gain Adjust
LowFrequencyFilterWidth
0x8820
4
RW
Configure windows (width) around the pixel (+/- val)
0
: filter is disable
1-255
: nb pixels around the pixel to filter