DTK PIM-TB10-Z, Руководство пользователя, Страница: 18 / 21

IOW,
[/0
write
command
This command
line
instructs an
l/O
device
to
read the data
on
the data
bus.
It may be driven
by
the processor
for
the
DMA
controller. This signal
is
active
low.
MEMR, memory
read command
This command
line instructs
the
memory
to
drive its
data
onto
the data
bus.
It may be driven
by
the processor
or
the
DMA
controller. This signal
is
active
low.
MEMW, memory
write
command
This command
line instructs
the
memory
to
store the data
present
on
the
data
bus.
It may be driven
by
the
processor
orthe
DMA
controller. This signal is
active
low.
DRQ1-DRO3,
DMA
requests
1
to
9
These
lines
are
for
asynchronous channel requests used
by
peripheral devices
to gain DMA
services.
They
are
prioritized
with DRQ3 being
the
lowest and DRQ1
being
the
highest. A request
is generated
by
bringing
a
DRQ
line
to an active level (high). A
DRQ
line must be held high
until
the corresponding
DACK line
goes
active.
DACK 0-3,
DMA
acknowledge 0 to 3
These
lines are DACK 0 -3
used
to
acknowledge DMA
requests
(DRQ1-DRQ3)
and
to
refresh system
dynamic
memory
(DACK 0).
They are
active
low.
AEN,
address
enable
This
line is
used
to
degate the processor and other
de—
vices
from
the
l/O
channel
to allow
DMA
transfers
to
take
place.
When this
line is
active high,
the
DMA
controller
had control
over the address bus, the data bus, the read
command
lines (memory
and
I/O)
and
the
write
command
lines (memory and
l/O).
28
O
O
T/C,
terminal count
This
line
provides
a
pulse when
the
terminal count for any
DMA
channel
IS
reached.
This signal
is active
high.
CARD SLCTD,
card selected
This
line is
activated
by
cards
in expansion slot J8.
lt
Signals
the system
board that the card
had been selected
and that appropriate
drivers on
the system board should
be directed
either
to
read
from
or to write to
expansion slot
J10. Connectors J3
through
J10 are
tied
together
at this
pm,
but the system board should
be driven
by
an
open
collector device.
The
following
voltages are available
on
the system
board
l/O
channel:
-
+5V DC
plus or minus 5%
located
on
two connector
pins.
°
{N DC
plus or minus 10% located
on
one connector
pin.
.
+_12V
DC
plus or minus 5% located
on
one connector
pin.
-
-12V
DC
plus or minus 10% located on
one connector
pin.
-
GND
(ground) located on three connector
pins.
29