Speaker
The
system
unit
has a
2
1/4-inch
audio speaker. The
speaker's
control circuits
and
driver
are
on
the system
board. The
speaker connects
through a two-wire interface
that attached
to
a three-pin connector
on
the system
board. The
speaker
drive circuit
is
capable
of
providing
approximately
1/2
watt
of
power. The control circuits allow
the speaker
to
be driven
three
different ways:
0
A
direct program control
register
bit
may be
toggled
to
generate a pulse
train.
-
The output
from
Channel
2 of
the timer/counter
may be
programmed
to
generate a
waveform to
the speaker.
0
The clock input
of
the timer/counter can
be
modulated
with
a program
controlled
by
the
I/O
register
bit.
All
three methods
may be performed simultaneously.
Expansion [/0
channel
The
l/O
channel
is
an
extension
of
the
8088 micropro-
cessor
bus.
It
is,
however, demultiplexed,
repowered and
enhanced
by
the
addition
of
interrupts
and
Direct Memory
Access
(DMA)
functions.
The
l/O
channel contains
an 8-bit, bidirectional
data
bus
with
20
address
lines,
six
levels
of
interrupt, control
lines for memory
and
l/O
read
or write, clock
and
timing
lines,
three channels
of DMA
control
lines,
memory
refresh
timing
control lines,
a channel check
line,
a
power
line
and
a
ground for
the adapters.
Four voltage levels
are
provided for
the expansion cards:
+5V DC, -5V DC,
+12V
DC
and
-12V
DC.
These
functions
are
provided
in
a
62-
pin
connector
with
too-mil
card tab
spacing.
24
0
O
A
"ready"
line is
available on
the
l/O
channel
to allow
operation
with slow
I/O
or
memory
deVIces.
If
the
channel's ready
line is
not
activated
by
an
addressed
device,
all
processor-generated
memory
read and
write
cycles take
four 210ns/clock or
840ns/byte.
All
processor—
generated
l/O
read and
write
cycles
reqUIre five
clocks for
a
cycle time
of
1.05us/byte. Refresh cycles occur once
every
72
clocks
(approximately
15us)
andrequne
four
clocks or approximately 7%
of
the bus
bandWIdth.
l/O
devices are
addressed
using
l/O-mapped
space.
The channel
is
designed
so that 768
l/O
devnces
addressed are
available
to
the
l/O
expansion cards.
A
channel
check
line
exists
for
reporting error
conditions to
the processor.
Activating this
line
results
in
a
Non-Masksable
Interrupt
(NMI)
to
the 8088 processor.
Memory
expansion
options
use
this
line
to report parity
errors.
The
l/O
channel
is
repowered
to
provide sufficient drive
to
power
all
eight
(J1
through J8)
expansion
slots,
under
conditions
of
two Low-power
Schottsky
(LS)
loads per
slot. The
l/O
adapters
typically
use
only
one load.
