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VC-20-PRJ25 IMBE™ Vocoder Board 
User’s Manual

 

 

Page 7 

Section 3 – Technical Specifications 

DVSI Confidential Proprietary 

 

 

GND, 

AGND 

GND is the digital ground signal and AGND is the analog ground signal.  These signals 
are connected on the VC-20-PRJ25. 

 

 

HD_SD 

The HD_SD signal must be set low to enable soft-decision decoding.  This signal is 
sampled once every 20 ms data frame.  If left unconnected, this signal is pulled internally 
to its inactive state (high). 

 

 

IRXD, 

IRXD1, and 

IRXD0 

IRXD, IRXD1, and IRXD0 are the in-phase data signals.  These signals provide three 
bits of soft-decision information, with IRXD being the MSB and IRXD0 being the LSB.  
If the HD_SD control signal is low (soft-decision mode enabled), then all three data 
signals are read by the decoder.  If HD_SD is high, then only IRXD (the MSB) is read 
by the decoder.  These signals are each clocked into the VC-20-PRJ25 on the falling 
edge of RXCK at 3.6 kHz.  These signals combined with the quadrature-phase data 
signals result in a total data rate of 7.2 kbps. 

 

 

ITXD and 

QTXD 

ITXD and QTXD are the in-phase and quadrature-phase voice data signals from the 
VC-20-PRJ25 encoder.  These signals are each clocked at 3.6 kHz, giving a total data 
rate of 7.2 kbps. 

 

 

LOST 

The LOST flag is active if the current frame of channel data is invalid, in which case the 
decoder ignores the current frame of channel data and performs a frame repeat.  This 
flag is only monitored during the first clock period of each frame. 

 

 

RESET 

The  RESET signal is a software flag that indicates that the voice codec had been reset 
or that the encoder had lost synchronization.  The VC-20-PRJ25 is reset under three 
conditions:  during power-up, as a result of DINRS being asserted, or as a result of a 
Watch-Dog Timer reset.  When the VC-20-PRJ25 successfully restarts from a reset or 
a loss of encoder synchronization, it will set the RESET flag high for one clock cycle of 
TXCK.  This flag is synchronous with the rising edge of TXCK.  RESET is a software 
flag; whereas, RESX is the hard-reset signal. 

 

 

RESX 

RESX is the reset status output signal.  It is active when the VC-20-PRJ25 is being 
reset.  The VC-20-PRJ25 is reset under three conditions: during power-up, as a result 
of DINRS being asserted, or as a result of a Watch-Dog Timer reset.  This signal is an 
active low output.  RESX is the VC-20-PRJ25's actual hard-reset signal; whereas, 
RESET is a software flag that is synchronous with TXCK. 

 

 

RUN 

RUN is a status signal that signifies that the VC-20-PRJ25 is encoding and decoding 
speech.  This signal drives the green  RUN LED.  Each data frame is divided into an 
encoder window and a decoder window.  The RUN signal is active within each 
respective window when the VC-20-PRJ25 is encoding or decoding speech (see figure 
6).  RUN is synchronous with TXCK. 

Содержание VC-20-PRJ25

Страница 1: ...VC 20 PRJ25 IMBE Vocoder Board User s Manual Version 2 0 Digital Voice Systems Inc The Speech Compression Specialists...

Страница 2: ...espect to the documentation and disclaims any implied warranties of merchantability and fitness for a particular purpose Digital Voice Systems Inc shall not be liable for any errors or for incidental...

Страница 3: ...r Board 2 3 Transfer of License a END USER may transfer the IMBE Software and all rights under this agreement to a third party together with a copy of this Agreement provided that END USER provides DV...

Страница 4: ...xclusion of implied warranties so the above exclusion may not apply to END USER No oral or written information or advice given by DVSI or its employees shall create a warranty or in any way increase t...

Страница 5: ...shall be enforced to the maximum extent permissible and the remaining provisions of this Agreement shall remain in full force and effect 12 0 Notices 12 1 Any notices to DVSI which may be given hereun...

Страница 6: ......

Страница 7: ...R SIGNAL DESCRIPTIONS 6 Section 4CHAPTER 2 TECHNICAL DRAWINGS 10 Section 5CHAPTER 3 DVSI SUPPORT SERVICES 16 TECHNICAL SUPPORT 16 LIST OF FIGURES Figure 1 Silence Voice Frame Signaling 9 Figure 2 VC 2...

Страница 8: ......

Страница 9: ...acceptance of these licensing terms The VC 20 PRJ25 operates by digitizing an analog speech signal using an on board A to D converter This digitized speech is then processed by the encoder and convert...

Страница 10: ...SD and LOST Note if soft decision information is unavailable then the HD_SD signal should be held high or left unconnected so that only the MSB data signals QRXD IRXD will be read by the decoder The f...

Страница 11: ...dBm0 0 dBm Sinusoidal Overload 3 17 dBm0 Nominal Level 23 dBm0 average speech level Dynamic Range 10 dB relative to Nominal Level Noise Level 72 dBm0 Analog Output Type single ended Impedance low impe...

Страница 12: ...ND 14 Reserved Reserved Reserved 15 Output RESET Reserved Input DINRS 16 Output STATUS Reserved Reserved 17 Output ENSLNCE Reserved Reserved 18 Input IRXD1 Reserved Input QRXD1 19 Input IRXD0 Reserved...

Страница 13: ...Receive data Q channel MSB QRXD1 Input Receive data Q channel QRXD0 Input Receive data Q channel LSB RXCK Input Receive data bit clock 3 6 kHz FMDE Input Decoder frame flag Active High LOST Input Los...

Страница 14: ...ently ENSLNCE is never active FMEN Silence Voice Voice Voice Silence ENSLNCE Figure 1 Voice Silence Detection Timing FEC_OFF The FEC_OFF signal can be pulled low to disable all error correction and in...

Страница 15: ...nvalid in which case the decoder ignores the current frame of channel data and performs a frame repeat This flag is only monitored during the first clock period of each frame RESET The RESET signal is...

Страница 16: ...e signals combined with the in phase data signals result in a total data rate of 7 2 kbps STATUS The STATUS flag indicates the status of the voice codec During normal operation the voice codec sets th...

Страница 17: ...K 2 Connects on board 3 6 kHz data clock to RXCK 3 Connects on board 20 ms frame clock to FMEN 4 Connects on board 20 ms frame clock to FMDE 5 Connects ITXD to IRXD0 LSB 6 Connects ITXD to IRXD1 7 Con...

Страница 18: ...tary Chapter 2 Technical Drawings Figure 2 Vocoder Connections in Loop back Mode ITXD TXCK FMEN ENSLNCE FMDE DESLNCE IRXD IRXD1 IRXD0 RXCK LOST ENCODER DECODER On Board Clock Frame Generator VFXI VFRO...

Страница 19: ...Drawings DVSI Confidential Proprietary Note Not meant to represent an off the shelf modem ITXD QTXD TXCK FMEN FMDE DESLNCE QRXD QRXD1 QRXD0 RXCK LOST ENCODER DECODER MODEM Figure 3 Connections betwee...

Страница 20: ...DER 2 DECODER 2 Figure 4 Dual Vocoder Connections ENCODER 1 DECODER 1 On Board Clock Frame Generator 1 FMEN TXCK LOST FMEN TXCK FMDE RXCK ITXD QTXD DESLNCE On Board Clock Frame Generator 2 VFXI VFRO V...

Страница 21: ...3 Section 4 Technical Drawings DVSI Confidential Proprietary Figure 5 Channel Interface Timing Relationships TXXK FMEN QTXD ITXD 500 ns RXCK FMDE QRXD IRXD LOST DESLNCE HD_SD 500 ns 20 ms 1 rate secon...

Страница 22: ...VC 20 PRJ25 IMBE Vocoder Board User s Manual Page 14 Section 4 Technical Drawings DVSI Confidential Proprietary RUN 12 5ms 20ms Figure 6 RUN Signal Timing 7 5ms Encoder Window Decoder Window...

Страница 23: ...anual Page 15 Section 4 Technical Drawings DVSI Confidential Proprietary Figure 7 Vocoder Physical Dimensions bottom view 3 0 mm 5 5 mm 41612 Connector 112 mm 100 mm 7 5 mm side view 11 mm 7 5 mm 112...

Страница 24: ...pter 3 DVSI Support Services Technical Support If you have any problems with the VC 20 PRJ25 IMBE Vocoder Board or have questions about its operation please contact Digital Voice Systems Inc 234 Littl...

Страница 25: ...Page 17 DVSI Confidential Proprietary NOTES...

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