VC-20-PRJ25 IMBE™ Vocoder Board
User’s Manual
Page 2
Section 2 - Operation
DVSI Confidential Proprietary
VC-20-PRJ25 IMBE™ Vocoder Operation
Operation
Connections are made to the VC-20-PRJ25 using the attached DIN 41612 connector
which is described in Sections 4 and 5. The user must supply the VC-20-PRJ25 with a 5v digital
power supply and a +/-5v analog power supply. It is preferable to decouple the analog supply from
the digital supply by using separate power supplies. The VC-20-PRJ25 contains one set of jumpers
which is used to loop-back the encoder signals to the decoder, and to enable the on-board clocks
and frame signals. The pin assignment for this jumper is documented in Section 7
The VC-20-PRJ25 can be operated in loop-back mode by using the internal clock and
frame generator to generate the clock signals, TXCK and RXCK, and the frame signals, FMEN and
FMDE, as shown in Figure 2. Jumpers 1-12 on the fourteen pin jumper block should be connected
and all other jumpers should be disconnected.
The VC-20-PRJ25 can be connected to a modem or similar device as shown in Figure 3.
The modem or the VC-20-PRJ25 can generate the clock and framing signals TXCK, FMEN,
RXCK and FMDE. The modem reads the data from the encoder on the data lines QTXD, ITXD,
and ENSLNCE. Simultaneously the decoder reads data from the modem on data lines QRXD,
QRXD1, QRXD0, IRXD, IRXD1, IRXD0, DESLNCE, HD_SD and LOST. Note: if soft-decision
information is unavailable, then the HD_SD signal should be held high (or left unconnected) so that
only the MSB data signals (QRXD, IRXD) will be read by the decoder. The frame signals FMEN
and FMDE are used to signify the beginning of each data frame for the encoder and decoder,
respectively. The required timing relationship between these signals is shown in Figure 5. In order to
operate in this mode, jumpers 5-10 and 12-14 should be disconnected. If the VC-20-PRJ25 is
generating the clocks and frames, then jumpers 1-4 should be connected, otherwise, they should be
disconnected. Jumper 11 is disconnected if the LOST signal is used, otherwise it is connected.
A final operating mode allows two VC-20-PRJ25's to be connected together using their
on-board clocks to generate the signals TXCK, FMEN, RXCK and FMDE. In this mode the
encoder on the first VC-20-PRJ25 is connected to the decoder on the second VC-20-PRJ25.
Similarly, the decoder on the first VC-20-PRJ25 is connected to the encoder on the second VC-20-
PRJ25. This is shown in Figure 4. Generally, the encoder signals on each board are synchronized
with the oscillator on that board, and the decoder signals on each board are synchronized with the
oscillator on the other board. This is done by connecting jumpers 1, 3 and 11 on each board. All
other jumpers should be disconnected. The HD_SD control signal must be held high or left
unconnected to disengage soft-decision decoding. Care must be taken that only one clock generator
is connected to each of the clock signals TXCK, FMEN, RXCK and FMDE.
Содержание VC-20-PRJ25
Страница 6: ......
Страница 8: ......
Страница 25: ...Page 17 DVSI Confidential Proprietary NOTES...