DIGITAL-LOGIC AG
PCCP5 Manual V2.3
26
4.4 Controllers
4.4.1 Interrupt Controllers
An 8259A compatible interrupt controller, within the chipset device, provides seven prioritized interrupt levels.
Of these, several are normally associated with the board's onboard device interfaces and controllers, and
several are available on the AT expansion bus.
Interrupt
Sources
onboard used
IRQ0
ROM-BIOS clock tick function, from timer 0
yes
IRQ1
Keyboard controller output buffer full
yes
IRQ2
Used for cascade 2. 8259
yes
IRQ3
COM2
yes
IRQ4
COM1
yes
IRQ5
Free for user
no
IRQ6
Floppy controller
yes
IRQ7
LPT1 parallel printer
yes
IRQ8
Battery backed clock, alarm function of the RTC
yes
IRQ9
Free for user
no
IRQ10
Ethernet (LAN), standard selection
yes
IRQ11
Free for user
no
IRQ12
PS/2 mouse
yes
IRQ13
Math coprocessor
yes
IRQ14
Harddisk IDE / SCSI
yes
IRQ15
Free for user
no
4.5 Timers and Counters
4.5.1 Programmable Timers
An 8253 compatible timer/counter device is also included in the board's ASIC device. This device is utilized
in precisely the same manner as in a standard AT implementation. Each channel of the 8253 is driven by a
1.190 MHz clock, derived from a 14.318 MHz oscillator, which can be internally divided down to provide a
variety of frequencies.
Timer 2 can also be used as a general purpose timer if the speaker function is not required.
Timer Assignment
Timer
Function
0
ROM-BIOS clock tick (18.2 Hz)
1
DRAM refresh request timing (15 µS)
2
Speaker tone generation time base
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