Digital Equipment 3100R Series, Руководство по техническому обслуживанию

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SCU Features
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Cache Options Group
Menu Fields Settings Comments
L1 cache Not user
selectable;
Always enabled Indicates that the processor L1 cache is
enabled.
L2 cache Not user
selectable;
Always enabled Indicates that the processor L2 cache is
enabled.
Cache system
BIOS ROM Enabled(1)
Disabled Enables or disables caching request for
server BIOS ROM (F0000h to FFFFFh).
Cache video
ROM Enabled(1)
Disabled Enables or disables the server to cache the
video BIOS in the C000 to C7FFh segment.
(1)
Factory default setting
Advanced Control Group
Menu Fields Settings Comments
Processor to
PCI Write
Posting Disabled
Enabled(1) When enabled, allows processor writes to the
PCI to be posted in the compatibility OPB
chipset.
PCI to DRAM
pipeline Disabled
Enabled(1) Enables pipelining of PCI to DRAM write
cycles.
APIC & MP
table Disabled
MPS 1.1
MPS 1.4(1) Applicable to single processor configurations
only, always enabled for Multi-Processing
(MP) operating system configurations. When
set to MPS 1.1 or MPS 1.4, the processor’s
Advanced Programmable Interrupt Controller
(APIC) is enabled, and the MP table used by
MP operating systems will be created.
Note: This parameter must be disabled for
NetWare 3.12 single processor systems.
Error correction
code Enabled(1)
Disabled Enables or disables the Error Correction Code
(ECC).
PCI parity check Enabled(1)
Disabled Enables or disables the PCI parity checking.
(1)
Factory default setting