Digilent Nexys2 Скачать руководство пользователя страница 16

Nexys2 Reference Manual 

 

Digilent 

www.digilentinc.com 

 

Copyright Digilent, Inc. 

  Page 16/17 

                                  Doc: 502-134 

 

Expansion connector  

 
The Nexys2 board includes a Hirose FX-2 high-
density 100 pin connector that is suitable for 
driving peripheral boards with signal rates in 
excess of 100 MHz. Many connector signals are 
routed to the FPGA as differential pairs, and 47 
connector pins are tied to ground, resulting in a 
very low-noise connection system. The self-
aligning Hirose FX-2 connector can be used for 
board-to-board connections or board-to-cable 
connections using the mating Hirose FX2-100S-
1.27 available from many catalog distributors 
and directly from Digilent.  
 
All signals routed from the FPGA to the FX-2 
connector include 75-ohm series resistors. The 
table on the right shows all signal connections 
between the FX-2 connector and the FPGA. 
Signals without corresponding entries in the 
FPGA column are not directly connected to the 
FPGA. 
 
 
 
 
 
 
 
 
 
 

Table 4: Hirose FX2 Connector Pin Assignments 

J1A

 

Name 

FPGA

 

J1B

 

Name 

FPGA

 

VCC3V3 

 

 

SHIELD 

 

VCC3V3 

 

GND 

 

TMS 

D15 

TDO-ROM 

 

JTSEL 

 

TCK 

A17 

TDO-FX2 

 

GND 

 

FX2-IO1 

B4 

GND 

 

FX2-IO2 

A4 

GND 

 

FX2-IO3 

C3 

GND 

 

FX2-IO4 

C4 

GND 

 

10 

FX2-IO5 

B6 

10 

GND 

 

11 

FX2-IO6 

D5 

11 

GND 

 

12 

FX2-IO7 

C5 

12 

GND 

 

13 

FX2-IO8 

F7 

13 

GND 

 

14 

FX2-IO9 

E7 

14 

GND 

 

15 

FX2-IO10 

A6 

15 

GND 

 

16 

FX2-IO11 

C7 

16 

GND 

 

17 

FX2-IO12 

F8 

17 

GND 

 

18 

FX2-IO13 

D7 

18 

GND 

 

19 

FX2-IO14 

E8 

19 

GND 

 

20 

FX2-IO15 

E9 

20 

GND 

 

21 

FX2-IO16 

C9 

21 

GND 

 

22 

FX2-IO17 

A8 

22 

GND 

 

23 

FX2-IO18 

G9 

23 

GND 

 

24 

FX2-IO19 

F9 

24 

GND 

 

25 

FX2-IO20 

D10 

25 

GND 

 

26 

FX2-IO21 

A10 

26 

GND 

 

27 

FX2-IO22 

B10 

27 

GND 

 

28 

FX2-IO23 

A11 

28 

GND 

 

29 

FX2-IO24 

D11 

29 

GND 

 

30 

FX2-IO25 

E10 

30 

GND 

 

31 

FX2-IO26 

B11 

31 

GND 

 

32 

FX2-IO27 

C11 

32 

GND 

 

33 

FX2-IO28 

E11 

33 

GND 

 

34 

FX2-IO29 

F11 

34 

GND 

 

35 

FX2-IO30 

E12 

35 

GND 

 

36 

FX2-IO31 

F12 

36 

GND 

 

37 

FX2-IO32 

A13 

37 

GND 

 

38 

FX2-IO33 

B13 

38 

GND 

 

39 

FX2-IO34 

E13 

39 

GND 

 

40 

FX2-IO35 

A14 

40 

GND 

 

41 

FX2-IO36 

C14 

41 

GND 

 

42 

FX2-IO37 

D14 

42 

GND 

 

43 

FX2-IO38 

B14 

43 

GND 

 

44 

FX2-IO39 

A16 

44 

GND 

 

45 

FX2-IO40 

B16 

45 

GND 

 

46 

GND 

 

46 

FX2-CLKIN 

B9 

47 

FX2-CLKOUT 

D9 

47 

GND 

 

48 

GND 

 

48 

FX2-CLKIO 

M9 

49 

VCCFX2 

 

49 

VCCFX2 

 

50 

VCCFX2 

 

50 

SHIELD 

 

Содержание Nexys2

Страница 1: ...nd a host of sensor and actuator interfaces All user accessible signals on the Nexys2 board are ESD and short circuit protected ensuring a long operating life in any environment The Nexys2 board is fu...

Страница 2: ...ply and 100mA from the 3 3V supply Required current will increase if larger circuits are configured in the FPGA and if peripheral boards are attached The table above summarizes the power supply parame...

Страница 3: ...e USB port A jumper on the Nexys2 board determines which source PC or ROM the FPGA will use to load its configuration The FPGA will automatically load a configuration from the Platform Flash ROM at po...

Страница 4: ...udes a 50MHz oscillator and a socket for a second oscillator Clock signals from the oscillators connect to global clock input pins on the FPGA so they can drive the clock synthesizer blocks available...

Страница 5: ...rent A ninth LED is provided as a power on LED and a tenth LED indicates FPGA programming status Note that LEDs 4 7 have different pin assignments due to pinout differences between the 500 and the 120...

Страница 6: ...ter of the time but because the eye cannot perceive the darkening of a digit before it is illuminated again the digit appears continuously illuminated If the update or refresh rate is slowed to around...

Страница 7: ...s 500mA and then activates a transistor switch to connect the USB cable voltage to the main input power bus The Nexys2 board typically draws around 300mA from the USB cable and care should be taken es...

Страница 8: ...scan code When an extended key is released an E0 F0 key up code is sent followed by the scan code Scan codes for most keys are shown in the figure A host device can also send data to the keyboard Belo...

Страница 9: ...period is 20 to 30KHz The mouse assumes a relative coordinate system wherein moving the mouse to the right generates a positive number in the X field and moving to the left generates a negative numbe...

Страница 10: ...precise information or for information on other VGA frequencies refer to documentation available at the VESA website CRT based VGA displays use amplitude modulated moving electron beams or cathode ra...

Страница 11: ...to right and top to bottom and not during the time the beam is reset back to the left or top edge of the display Much of the potential display time is therefore lost in blanking periods when the beam...

Страница 12: ...erived Timings for sync pulse width and front and back porch intervals porch intervals are the pre and post sync pulse times during which information cannot be displayed are based on observations take...

Страница 13: ...tatic DRAM device organized as 8Mbytes x 16bits It can operate as a typical asynchronous SRAM with read and write cycle times of 70ns or as a synchronous memory with an 80MHz bus When operated as an a...

Страница 14: ...plete information is available for both devices from the manufacturer websites Table 2 Memory Address and Data Bus Pin Assignments Address signals Data signals ADDR0 NA ADDR8 H6 ADDR16 M5 DATA0 L1 DAT...

Страница 15: ...nectors are labeled JA nearest the power jack JB JC and JD nearest the expansion connector Pinouts for the Pmod connectors are provided in the table below More than 30 low cost are available for attac...

Страница 16: ...e FX2 Connector Pin Assignments J1A Name FPGA J1B Name FPGA 1 VCC3V3 1 SHIELD 2 VCC3V3 2 GND 3 TMS D15 3 TDO ROM 4 JTSEL 4 TCK A17 5 TDO FX2 5 GND 6 FX2 IO1 B4 6 GND 7 FX2 IO2 A4 7 GND 8 FX2 IO3 C3 8...

Страница 17: ...e FAIL After the memory test the buttons and switches will drive the LEDs and seven segment display so that all user I O devices can be manually checked If the self test is not resident in the Platfor...

Страница 18: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Digilent 410 134P KIT...

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