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Zeta User Manual Rev 1.0
Page 47
14.5
Counter/Timer Features
14.5.1
Overview
Zeta
“A” models include 8 32
-bit counter/timers with a wide array of features and programmability. Both up and
down counting are supported, and the clock for each counter can be selected from an internal 50MHz or 1MHz
clock or an external digital signal. In down counting mode, an optional programmable-width output pulse may be
enabled each time the counter reaches zero. Counters can also be used to generate programmable interrupts on
the ISA bus, enabling custom code to be run at precise user-defined intervals.
14.5.2
Counter Commands
The counters are configured and managed with a series of commands. These commands are implemented in the
Diamond Systems Universal Driver software. Commands may operate on either a single counter or any
combination of counters simultaneously using a user-defined selection mask.
Command
Function
0
Clear one or more counters. If a counter is running at the time it is cleared, it will continue
1
Load counter with user-defined 32-bit value
2
Select count direction, up or down
4
Enable / disable counting
5
Latch counter; a counter must be latched before its count value can be read back. The latch
is a snapshot of the counter value at one moment in time. The counter continues to run
after latching.
6
Select clock source for one or more counters. Options include internal 50MHz clock, internal
10MHz clock, or the counter’s designated I/O pin on port C.
7
Enable / disable auto-reload
8
Enable counter output pulse on designated I/O pin on port C
9
Configure counter output pulse width; options include 1, 10, 100, or 1000 clock periods
10
Read counter value. A counter must be latched with command 5 before its contents can be
read back.
15
Reset one more counters. When a counter is reset its configuration and contents are lost.
14.5.3
Counter I/O Signals
Counter clock and output signals may be made available on digital I/O port C pins as defined below. A counter can
use its port C pin for either an external clock or its output signal, not both at the same time.
NOTE: The voltage levels of the counter I/O signals will match the configuration of the digital I/O circuit, either
3.3v or 5V depending on the DIO configuration jumper settings on jumper block JP1.
DIO pin
Input
Output
C0
Counter 0 clock
Counter 0 output
C1
Counter 1 clock
Counter 1 output
C2
Counter 2 clock
Counter 2 output
C3
Counter 3 clock
Counter 3 output
C4
Counter 4 clock
Counter 4 output
C5
Counter 5 clock
Counter 5 output
C6
Counter 6 clock
Counter 6 output
C7
Counter 7 clock
Counter 7 output
