Athena III User Manual Rev A.03
www.diamondsystems.com
Page
52
Base + 5
Write
FIFO Threshold / FIFO Threshold X8
Bit No.
7
6
5
4
3
2
1
0
Name
X/FT10
X/FT09
FT5/FT08 FT4/FT07 FT3/FT06 FT2/FT05 FT1/FT04 FT0/FT03
Reset
0
0
0
0
0
0
0
0
FT5
–0
When EXFIFO = 0 (Basic Mode, See Register Description for Page 2 Base+12)
FIFO threshold. When the number of A/D samples in the FIFO reaches this number, the board
will generate an interrupt and set AINT high (Base + 7 bit 4).
The valid range is 1-48. If the value written is greater than 48, then 48 will be used. If the value
written is 0, then 1 will be used.
FT10
–03
When EXFIFO = 1 (Enhanced Mode, See Register Description for Page 2 Base+12)
FIFO threshold (upper 8 of 11 bits). When the number of A/D samples in the FIFO reaches this
number, the board will generate an interrupt and set AINT high (Base + 7 bit 4).
The valid range is 8
– 2048 in steps of 8. When EXFIFO is set to 1 for the first time the FIFO
threshold is set automatically to 1024.
The interrupt routine is responsible for reading the correct number of samples out of the FIFO.
The interrupt rate is equal to the total sample rate divided by the FIFO threshold. Generally, for
higher sampling rates a higher threshold should be used to reduce the interrupt rate. However
remember that the higher the FIFO threshold, the smaller the amount of FIFO space remaining to
store data while waiting for the interrupt routine to respond. If you get a FIFO overflow condition,
you must lower the FIFO threshold and/or lower the A/D sampling rate.
Base + 5
Read
FIFO Threshold / FIFO Depth LSB
Bit No.
7
6
5
4
3
2
1
0
Name
X/FD07
X/FD06 FT5/FD05 FT4/FD04 FT3/FD03 FT2/FD02 FT1/FD01 FT0/FD00
Reset
0
0
0
0
0
0
0
0
FT5-0
When EXFIFO = 0 (Basic Mode, See Register Description for Page 2 Base+12)
FIFO threshold. When the number of A/D samples in the FIFO reaches this number, the board
will generate an interrupt and set AINT high (Base + 7 bit 4).
FD07-00
When EXFIFO = 1 (Enhanced Mode, See Register Description for Page 2 Base+12)
Current FIFO Depth LSB. This value indicates the lower 8 bits of the number of A/D values
currently stored in the FIFO.