UM-B-114
DA14531 Development Kit Pro Hardware User Manual
User Manual
Revision 1.1
25-Oct-2019
CFR0012
56 of 80
© 2019 Dialog Semiconductor
Appendix A FCGQFN24 PRO-DB: DA14531-00FXDB-P_(376-04-F2)
A.1
Schematic
Figure 56: Schematic, FCGQFN24, DA14531-00FXDB-P_(376-04-F2)
SW
D
IO
SW
C
LK
C6
NP
C7
NP
T
it
le
:
D
oc
.
N
r.
R
ev
:
D
at
e:
Sheet
:
of
Dialog Semiconductor N.E.O. Athinon- Patron 15 26441, Patra, Greece tel. (+30) 2610390940 fax. (+30) 2610390941
D
es
igner:
F
D
A
14
53
1/
D
26
32
D
ev
el
o
p
m
en
t
K
it
D
au
g
h
te
rb
o
ar
d
2
2
M
onday
,
Augus
t
12,
2019
Kalliopi
Liant
iniot
i
<
Variant
N
am
e>
M
B0_6
M
B0_5
M
B0_4
M
B0_3
M
B0_0
M
B0_7
R
14
0
BT
1
NP
M
B0_5
R
23
NP
R
24
NP
M
B2_1
M
B2_0
M
B0_6
VBAT
M
B2_0
M
B1_0
M
B1_1
M
B2_3
M
B2_2
M
B2_1
M
B2_6
M
B2_5
M
B2_4
M
B2_9
M
B2_8
M
B2_7
M
B3_0
L1
2.
2uH
Z2
3.
3nH
Z3
1.
8pF
Z1
1.
8pF
R
32
NP
M
B3_1
JT
AG
BR
EA
KO
UT
H
EA
DE
RS
4
-P
IN
U
A
R
T
SP
I
FL
AS
H
Y1
32.
0000M
H
Z
1
3
2
4
M
B2_3
M
B2_4
R
31
0
R
15
NP
Z4
1.
00pF
Z6
0.
5pF
M
B2_2
M
B2_5
M
B0_0
M
B0_3
SW
C
LK
SW
D
IO
M
B0_6
M
B0_5
M
B0_4
J1
A
PC
IE_64
A1
A1
A6
A6
B9
B9
B10
B10
B13
B13
B14
B14
A24
A24
B28
B28
B30
B30
A10
A10
A11
A11
A12
A12
B32
B32
A14
A14
A15
A15
A16
A16
A17
A17
A18
A18
A19
A19
A20
A20
A21
A21
A22
A22
B17
B17
B1
B1
A25
A25
B20
B20
B16
B16
B11
B11
B31
B31
B24
B24
A31
A31
A32
A32
M
B1_3
M
B0_7
J1
B
PC
IE_64
B15
B15
A28
A28
B3
B3
B18
B18
B22
B22
B19
B19
A27
A27
B26
B26
B12
B12
B4
B4
B5
B5
A5
A5
B6
B6
B7
B7
A7
A7
A8
A8
A9
A9
B25
B25
A26
A26
B27
B27
A29
A29
A4
A4
B8
B8
A13
A13
A23
A23
B23
B23
B29
B29
A30
A30
B2
B2
A2
A2
A3
A3
B21
B21
J2
M
20-889054
5R
D
A
14
53
1
24
-p
in
F
C
G
Q
F
N
U1
D
A14531-QF
N
24
X
T
AL32M
m
4
R
F
IOm
18
R
F
IOp
1
GND
_DC
DC
21
X
T
AL32M
p
3
P0_8
17
P0_1
11
P0_0/
R
ST
10
P0_2/
SW
C
LK
12
P0_3/
X
T
AL32k
p
13
P0_11
8
GND
20
GND
RF
2
2
P0_4/
X
T
AL32k
m
14
P0_5
24
P0_10/
SW
D
IO
9
P0_7
15
P0_6
22
Lx
6
VBAT_LOW
5
VSS
23
VBAT_H
IGH
7
GND
RF
1
19
P0_9
16
R
35
NP
R
34
NP
U
T
X
VL+
U
R
T
S
U
C
T
S
URX
VL-
VH
+
VH
-
P0_0
R
19
0
R
20
0
R
21
0
R
22
0
M
B2_4
M
B2_3
M
B2_1
M
B2_0
RF2
R
ESET
Ca
rd Ed
ge
C
on
ne
cto
r (PC
I-E)
1
-W
IR
E
U
A
R
T
(2
)
M
ISO
C
S#
M
OSI
VBAT
SC
LK
VH
+
VL+
VH
-
VH
-
VL-
R
25
NP
R
26
NP
M
B0_4
(def
ault
)
(opt
.1)
M
B2_0
M
B0_5
R
27
NP
R
28
NP
M
B0_5
R
29
NP
P0_5
VL-
P0_10
P0_1
Z5
5.
6nH
Y2
32.
768KH
Z
VH
+
R
33
NP
U2
T
C
R
2EF
11_LM
_C
T
IN
1
GN
D
2
CE
3
NC
4
OU
T
5
P0_3
P0_4
VI
N
VLD
O
C2
10uF
C
U
R
R
E
N
T
M
E
A
S
U
R
E
M
E
N
T
Z9
10pF
1
.1
V
L
D
O
J3
N
P_142-076
1-861
1
2 3 4
Z7
NP
RF3
P0_2
P0_1
R
11
NP
C3
1.
0uF
APPLICABLE ONLY TO DA14580DEVKT-P_B/C
FOR DA145xxDEVKT-P_D SET TO BUCK (H) AND SELECT THE DESIRED MODE FROM THE MB
P0_7
P0_6
P0_5
P0_9
P0_8
P0_11
P0_10
C4
1.
0uF
SW
D
IO
SW
C
LK
DEBUGGING OPTION (NOT POPULATED)
C1
2.
2U
F
J5
Jt
ag
_C
on
n_
2x
5_
1m
m
27
VD
D
7
DIO
4
C
LK
3
URX
2
U
T
X
1
R
ST
6
VPP
5
GN
D
1
8
NC1
9
GN
D
2
10
VBAT
C5
NP
3rd order Chebyshev Low Pass Filter
RF1
BYPASS
BO
OS
T
S
W
1
J
S203011
J
C
QN
4
3
2
6
7
8
1
5
VL+
VI
N
VBAT
VH
+
VLD
O
P
O
W
E
R
M
O
D
E
S
E
L
E
C
T
IO
N
BU
CK
(L
)
(B
)
(H)
A
N
T1
Ant
enna_I
F
A_t
y
pe_R
ight
M
B2_1
M
B2_0
M
B2_7
M
B2_6
M
B2_5
M
B2_4
M
B2_3
M
B2_2
M
B2_9
M
B2_8
M
B3_0
M
B3_1
VL+
R
30
1.
00k
P0_0
R
ST
R1
36
P0_0
R2
36
R3
36
P0_1
P0_2
R4
36
P0_3
R5
36
P0_4
R6
36
M
ISC
. PER
IPH
ER
A
LS
R
ESET
M
B1_3
M
B1_1
M
B1_0
P0_5
R7
36
R
17
1.
00k
R
13
NP
P0_6
R8
36
R
16
0
R
18
1.
00k
M
B2_8
P0_7
R9
36
LED
POR
M
B3_1
M
B3_0
M
B2_9
P0_8
R
10
36
T
R
IG
BU
T
T
ON
P0_9
P0_10
R
12
36
P0_11