Denon DVP-602CI, Руководство по обслуживанию

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DVP-602CI
76 P12/D10 SUBnCONFIG O C - - Eu - FPGA rewrite control
77 P11/D9 DSP1 VPP O C - - Eu - Normal : H, FLASH write for DSP : L
78 P10/D8 SUBDATA̲O I - Lv - Ed Z FPGA rewrite control(MAIN FPGA&GUI FPGA combined use)
79 P07/D7 SUBCONF̲DONE I - Lv - Ed Z FPGA rewrite control(MAIN FPGA&GUI FPGA combined use)
80 P06/D6 O C - - Ed Z Not used
81 P05/D5 SUBnCS O C - - Eu Z FPGA rewrite control(MAIN FPGA&GUI FPGA combined use)
82 P04/D4 SUBASDI O C - - Eu Z FPGA rewrite control(MAIN FPGA&GUI FPGA combined use)
83 P03/D3 INT1 I - E ↓ &L - Ed Z DIR control pin(LC89057W-VF4-E)
84 P02/D2 PLDTCK̲A O C - - - Z PLD rewrite control(JTAG), OPEN other than communication time
85 P01/D1 PLDTDO̲V I - Lv - - Z PLD rewrite control(JTAG)
86 P00/D0 DIRRST1 O C - - - Z DIR control pin(LC89057W-VF4-E)
87 P107/AN7 DSP2 RST O C - - Ed Z DSP2(ADSP-21367)reset output pin(reset : L)
88 P106/AN6 DSP1 RST O C - - Ed Z DSP1(ADSP-21366)reset output pin(reset : L)
89 P105/AN5 DSPROMRST O C - - Ed Z DSP memory reset output pin(reset : L)
90 P104/AN4 DSP1 FLAG0 I - Lv - Ed Z DSP1 control pin(ADSP-21366)
91 P103/AN3 DSP2 FLAG0 I - Lv - Ed Z DSP2 control pin(ADSP-21367)
92 P102/AN2 DSP2 ICS O C - - Eu Z DSP2 control pin(ADSP-21367)
93 P101/AN1 DSP1 ICS O C - - Eu Z DSP1 control pin(ADSP-21366)
94 AVSS AVSS - - - - - - AD GND
95 P100/AN0 SUBDCLK O C - - - Z FPGA rewrite control
96 VREF VREF - - - - - - AD ref. +3.3V
97 AVCC AVCC - - - - - - AD +3.3V
98 P97/SIN4 DSPMISO I - Lv - Eu Z DSP control pin(ADSP-21366)/(ADSP-21367)
99 P96/SOUT4 DSPMOSI O C - - Eu Z DSP control pin(ADSP-21366)/(ADSP-21367)
100 P95/CLK4 DSPICLK O C - - Eu Z DSP control pin(ADSP-21366)/(ADSP-21367)
Pin Pin Name Symbol I/O Type Det Op(Int.) Op(Ext.) Res Function
Note: Pin No. : Terminal number of microcomputer.
Port Name : The name entered in the data sheet of microcomputer.
Symbol
: Symbolized interface function.
I/O : Input or out of part.
“I” = Input port
“O” = Output port
Type : Composition of port in case of output port.
“C” = CMOS output
“N” = NMOS open drain output
“P” = PMOS open drain output
Op : Pull up/Pull down selection information.
“Iu” = Inner microcomputer pull up
“Id” = Inner microcomputer pull down
“Eu” = External microcomputer pull up
“Ed” = External microcomputer pull down
Det : Indicates judging state of input port. Level detection is “LV”; Edge detection is “Ed”; Detection by both shifting is “E&L”;
Serial data detection is “S” (Serial data output is also “S”).
Res : State at reset.
“H” = Outputs High Level at reset
“L” = Outputs Low Level at reset
“Z” = Becomes High impedance mode at reset
STBY : State of port when STANDBY mode.
“O/L” = Output port and “L”
“I”
= Input port
Stop : State of port when Stop mode.
“O/L” = Output port and “L”
“I”
= Input port