Denon AVR-1911, Руководство по обслуживанию

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115
TCC8600 Pin Description in Pin Number Order
Doc. No AS-C-8600X-EA
TCC8600-00X-EAR
Rev. No 2.0
32-bit RISC Microprocessor for Host Player
Page 10 of 30
TELECHIPS Inc.
www.telechips.com
Signal Name Pin# Type Description – TCC8600
VDDI 58 PWR Digital Power for Internal Core (1.8V)
VDDI 91 PWR Digital Power for Internal Core (1.8V)
VDDI
110 PWR Digital Power for Internal Core (1.8V)
VDDI 124 PWR Digital Power for Internal Core (1.8V)
VDDADC 69 PWR Analog Power for ADC (3.3V)
VDDPLL 74 PWR Analog & Digital Power for PLL (1.8V)
VDDPLL1
73 PWR Analog & Digital Power for PLL1 (1.8V)
VSS 1 GND Digital Ground
VSS 8 GND Digital Ground
VSS 25 GND Digital Ground
VSS
45 GND Digital Ground
VSS 59 GND Digital Ground
VSS 81 GND Digital Ground
VSS 97 GND Digital Ground
VSS
118 GND Digital Ground
VSSADC 70 GND Analog Ground for ADC
VSSPLL 76 GND Analog Ground for PLL
VSSPLL1 71 GND Analog Ground for PLL
Table 2.2 TCC8600 Pin Description in Pin Number Order
Pin# Signal Name Type Description – TCC8600
1 VSS GND Digital Ground
2 XD[4] I/O External Bus Data Bit [4]. Internal pull-up resistor enabled at reset.
3 XD[5] I/O External Bus Data Bit [5]. Internal pull-up resistor enabled at reset.
4 XD[6] I/O External Bus Data Bit [6]. Internal pull-up resistor enabled at reset.
5 XD[7] I/O External Bus Data Bit [7]. Internal pull-up resistor enabled at reset.
6 XD[8] I/O External Bus Data Bit [8]. Internal pull-up resistor enabled at reset.
7 VDDI PWR Digital Power for Internal Core (1.8V)
8 VSS GND Digital Ground
9 VDDIO PWR Digital Power for I/O (3.3V)
10 XD[9] I/O External Bus Data Bit [9]. Internal pull-up resistor enabled at reset.
11 XD[10] I/O External Bus Data Bit [10]. Internal pull-up resistor enabled at reset.
12 XD[11] I/O External Bus Data Bit [11]. Internal pull-up resistor enabled at reset.
13 XD[12] I/O External Bus Data Bit [12]. Internal pull-up resistor enabled at reset.
14 XD[13] I/O External Bus Data Bit [13]. Internal pull-up resistor enabled at reset.
15 XD[14] I/O External Bus Data Bit [14]. Internal pull-up resistor enabled at reset.
16 XD[15] I/O External Bus Data Bit [15]. Internal pull-up resistor enabled at reset.
17 XA[0] I/O External Bus Address Bit [0]
18 XA[1] I/O External Bus Address Bit [1]
19 XA[2] I/O External Bus Address Bit [2]
20 XA[3] I/O External Bus Address Bit [3]
21 XA[4] I/O External Bus Address Bit [4]
22 XA[5] I/O External Bus Address Bit [5]
23 XA[6] I/O External Bus Address Bit [6]
24 VDDI PWR Digital Power for Internal Core (1.8V)
25 VSS GND Digital Ground
26
VDDIO
PWR Digital Power for I/O (3.3V)
27 XA[7] I/O External Bus Address Bit [7]
28 XA[8] I/O External Bus Address Bit [8]
29 XA[9] I/O External Bus Address Bit [9]
30
XA[10]
I/O External Bus Address Bit [10]
31 XA[11] I/O External Bus Address Bit [11]
32 XA[12] I/O External Bus Address Bit [12]
33 XA[13] / SD_BA[0] I/O External Bus Address Bit [13] / SDRAM Bank Address 0.
34
XA[14] / SD_BA[1]
I/O External Bus Address Bit [14] / SDRAM Bank Address 1
35 XA[15] / SD_nCAS I/O External Bus Address Bit [15] / SDRAM CAS signal
Doc. No AS-C-8600X-EA
TCC8600-00X-EAR
Rev. No 2.0
32-bit RISC Microprocessor for Host Player
Page 10 of 30
TELECHIPS Inc.
www.telechips.com
Signal Name Pin# Type Description – TCC8600
VDDI 58 PWR Digital Power for Internal Core (1.8V)
VDDI
91 PWR Digital Power for Internal Core (1.8V)
VDDI 110 PWR Digital Power for Internal Core (1.8V)
VDDI 124 PWR Digital Power for Internal Core (1.8V)
VDDADC 69 PWR Analog Power for ADC (3.3V)
VDDPLL
74 PWR Analog & Digital Power for PLL (1.8V)
VDDPLL1 73 PWR Analog & Digital Power for PLL1 (1.8V)
VSS 1 GND Digital Ground
VSS 8 GND Digital Ground
VSS
25 GND Digital Ground
VSS 45 GND Digital Ground
VSS 59 GND Digital Ground
VSS 81 GND Digital Ground
VSS
97 GND Digital Ground
VSS 118 GND Digital Ground
VSSADC 70 GND Analog Ground for ADC
VSSPLL 76 GND Analog Ground for PLL
VSSPLL1
71 GND Analog Ground for PLL
Table 2.2 TCC8600 Pin Description in Pin Number Order
Pin# Signal Name Type Description – TCC8600
1
VSS
GND Digital Ground
2 XD[4] I/O External Bus Data Bit [4]. Internal pull-up resistor enabled at reset.
3 XD[5] I/O External Bus Data Bit [5]. Internal pull-up resistor enabled at reset.
4 XD[6] I/O External Bus Data Bit [6]. Internal pull-up resistor enabled at reset.
5
XD[7]
I/O External Bus Data Bit [7]. Internal pull-up resistor enabled at reset.
6 XD[8] I/O External Bus Data Bit [8]. Internal pull-up resistor enabled at reset.
7 VDDI PWR Digital Power for Internal Core (1.8V)
8 VSS GND Digital Ground
9
VDDIO
PWR Digital Power for I/O (3.3V)
10 XD[9] I/O External Bus Data Bit [9]. Internal pull-up resistor enabled at reset.
11 XD[10] I/O External Bus Data Bit [10]. Internal pull-up resistor enabled at reset.
12 XD[11] I/O External Bus Data Bit [11]. Internal pull-up resistor enabled at reset.
13
XD[12]
I/O External Bus Data Bit [12]. Internal pull-up resistor enabled at reset.
14 XD[13] I/O External Bus Data Bit [13]. Internal pull-up resistor enabled at reset.
15 XD[14] I/O External Bus Data Bit [14]. Internal pull-up resistor enabled at reset.
16 XD[15] I/O External Bus Data Bit [15]. Internal pull-up resistor enabled at reset.
17
XA[0]
I/O External Bus Address Bit [0]
18 XA[1] I/O External Bus Address Bit [1]
19 XA[2] I/O External Bus Address Bit [2]
20 XA[3] I/O External Bus Address Bit [3]
21
XA[4]
I/O External Bus Address Bit [4]
22 XA[5] I/O External Bus Address Bit [5]
23 XA[6] I/O External Bus Address Bit [6]
24 VDDI PWR Digital Power for Internal Core (1.8V)
25
VSS
GND Digital Ground
26 VDDIO PWR Digital Power for I/O (3.3V)
27 XA[7] I/O External Bus Address Bit [7]
28 XA[8] I/O External Bus Address Bit [8]
29
XA[9]
I/O External Bus Address Bit [9]
30 XA[10] I/O External Bus Address Bit [10]
31 XA[11] I/O External Bus Address Bit [11]
32 XA[12] I/O External Bus Address Bit [12]
33
XA[13] / SD_BA[0]
I/O External Bus Address Bit [13] / SDRAM Bank Address 0.
34 XA[14] / SD_BA[1] I/O External Bus Address Bit [14] / SDRAM Bank Address 1
35 XA[15] / SD_nCAS I/O External Bus Address Bit [15] / SDRAM CAS signal