B E L K Q u i c k S t a r t G u i d e
v . 1 . 0 . 9
files from the
constr
directory of the BORA repository
●
check that the option
Copy constraints files into
project
is enabled
●
create the synthesis, implementation and bitstream
clicking
Generate Bitstream
from the
Flow
Navigator
and wait the completion of the operation
●
once completed, select
Open Implemented Design
●
create the binary bitstream running the tcl script
provided with the BORA repository. Launch
Tools ->
Run Tcl Script
●
select the
generate_binary_bitstream.tcl
file from
the scripts directory from the BORA repository
●
select
File -> Export -> Export Hardware
●
on the next window, enable
Include Bitstream
and
click OK
●
now launch the SDK session to generate the FSBL,
clicking on
File -> Launch SDK
●
once the Xilinx SDK is ready, perform the following operations
from the GUI:
Click on
File -> New -> Application Project
Select the
Project Name
:
bora_FSBL
Click
Next
Select
Template
:
Zynq FSBL
Click on
Finish
Apply the patch, right-clicking on bora_FSBL in Project
Explorer and then clicking on
Team -> Apply Patch..
From
Browse...
open the file
<bora_repo>/patch/belk-sd-boot.patch
Click
Next
Select
Apply the patch to the selected file, folder or
project
:
and select
main.c
from
bora_FSBL -> src
Click
Next
March, 2016
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