Data Translation DT300 Series, Руководство пользователя, Страница: 87 / 164

Principles of Operation
87
Vout = 2010 * 0.
−
9.98 V
Vout =
−
9.367 V
For the DT301, DT302, DT303, and DT304 boards, the board outputs FFFh (plus full-scale) for
above-range signals and 000h (minus
full-scale) for below-range signals. For the 16-bit
resolution DT321 and DT322 boards, the board outputs FFFFh (plus full-scale) for
above-range signals and 0000h (minus
full-scale) for below-range signals.
Data Transfer
The board packs two input samples (an even and an odd sample) into each transfer to the host
computer. Samples corresponding to entries 0, 2, 4, and so on, in the channel list are
considered even samples; samples corresponding to entries 1, 3, 5, and so on, in the channel
list are considered odd samples.
Using flags internally, the board determines whether the acquired samples are pre-trigger or
post-trigger samples. These flags are not transferred to the host computer. The host computer
can read the register on the board to determine where the post-trigger data starts. Note that
the host computer cannot read data directly from the board; the data must be transferred to
the host computer.
Using PCI bus mastering, the board transfers the analog input data to a 256 KB circular buffer
in the host computer; this buffer is dedicated to the hardware. The board treats each buffer as
two consecutive 128 KB blocks of memory.
Note: When you stop an analog input operation, a final block of two samples is transferred
even if only one sample is required. The host software ignores the extra sample.
The DT300 Series Device Driver accesses the hardware circular buffer to fill user buffers that
you allocate in software. It is recommended that you allocate a minimum of two buffers for
analog input operations and add them to the subsystem queue using software.
Data is written
to the queued input buffers continuously; when no more empty buffers are available on the
queue, the operation stops. The data is gap-free.
Error Conditions
The DT300 Series board can report the following analog input error conditions to the host
computer:
• A/D Over Sample – Indicates that the A/D sample clock rate is too fast. This error is
reported if a new A/D sample clock pulse occurs while the ADC is busy performing a
conversion from the previous A/D sample clock pulse. The host computer can clear this
error. To avoid this error, use a slower sampling rate.