Data Translation DT300 Series, Руководство пользователя, Страница: 136 / 164

Appendix A
136
Counter/Timer Specifications
Table 28 lists the specifications for the C/T subsystems.
Table 28: C/T Subsystem Specifications
Feature Specifications
Number of counter/timer channels 4
Clock Inputs
Input type:
Input load:
High-level input voltage:
Low-level input voltage:
Hysteresis:
High-level input current:
Low-level input current:
Minimum pulse width:
Maximum frequency:
Termination:
Schmitt trigger, rising-edge sensitive
1 HCT14 (TTL)
2.0 V minimum
0.8 V maximum
0.4 V (minimum); 1.5 V (maximum)
1.0
μ
A
–
1.0
μ
A
100 ns (high); 100 ns (low)
5.0 MHz
33
Ω
series resistor
Gate Inputs
Input type:
Input load:
High-level input voltage:
Low-level input voltage:
Hysteresis:
High-level input current:
Low-level input current:
Minimum pulse width:
Termination:
Schmitt trigger, level sensitive
1 HCT14 (TTL)
2.0 V minimum
0.8 V maximum
0.4 V (minimum); 1.5 V (maximum)
1.0
μ
A
–
1.0
μ
A
100 ns (high); 100 ns (low)
33
Ω
series resistor
Counter Outputs
Output driver:
Output driver high voltage:
Output driver low voltage:
Termination:
TTL
2.0 V minimum (IOH =
–
15 mA);
2.4 V minimum (IOH =
–
3 mA)
0.5 V maximum (IOL = 24 mA);
0.4 V maximum (IOL = 12 mA)
33
Ω
series resistor