PCIe-FRM11 User’s Manual (Rev 1.4)
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Valid, Data Valid, and a spare). In addition, a clock signal is generated by one LVDS to synchronize the
signal between the camera and the PCIe-FRM11, and the remaining camera control signals and
communication signals are converted into a general TTL signal level.
CCx+
CCx-
Camera Control
The above picture shows the camera control output circuit that can send the control signal from the
PCIe-FRM11 board to the camera via the camera-link cable. All four digital outputs are output through
Differential method. Each output is mapped to a digital output and output. Each bit position is shown in
[Figure 2-3] below.
CC1+
CC1-
CC_D0
CC2+
CC2-
CC_D1
CC3+
CC3-
CC_D2
CC4+
CC4-
CC_D3
[Figure 2-3. Camera Control LVDS Digital Circuit]
The figure below shows a circuit that uses the serial input signal input through the camera-link cable
as a general input on the PCIe-FRM11 board.
[Figure 2-4. Serial Communication LVDS Digital Circuit]
Содержание PCIe-FRM11
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