Dallas DS5000(T) Скачать руководство пользователя страница 11 | Manualshive

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DS5000(T)

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EXPANDED PROGRAM MEMORY READ CYCLE

EXPANDED DATA MEMORY READ CYCLE

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Содержание DS5000(T)

Страница 1: ...ON The DS5000 T Soft Microcontroller Module is a fully 8051 compatible 8 bit CMOS microcontroller that offers softness in all aspects of its application This is accomplished through the comprehensive use of nonvolatile technology to preserve all information in the absence of system VCC The internal program data memory space is implemented using either 8 or 32 kbytes of nonvolatile CMOS SRAM Furthe...

Страница 2: ...DERING INFORMATION PART RAM SIZE kB MAX CRYSTAL SPEED MHz TIMEKEEPING DS5000 32 16 32 16 No DS5000 32 16 32 16 No DS5000T 32 16 32 16 Yes DS5000T 32 16 32 16 Yes Denotes a lead free package DS5000 T BLOCK DIAGRAM Figure 1 ...

Страница 3: ...P2 7 A8 A15 General Purpose I O Port 2 MSB of the Expanded Address Bus 29 PSEN Active Low Program Store Enable Used to enable an external program memory when using the expanded bus It is normally an output and should be unconnected if not used PSEN also is used to invoke the bootstrap loader At this time PSEN is pulled down externally This should only be done once the DS5000 T is already in a rese...

Страница 4: ...ta memory Since the basic addressing capability of the machine is 16 bits a maximum of 64 kbytes of program memory and 64 kbytes of data memory can be accessed by the DS5000 T CPU The 8 or 32 kbyte RAM area inside of the DS5000 T can be used to contain both program and data memory The real time clock RTC in the DS5000T is reached in the memory map by setting a SFR bit The MCON 2 bit ECE2 is used t...

Страница 5: ...ts versatility and ease of use 2 Parallel Program Load cycles that perform the initial loading from parallel address data information presented on the I O port pins This mode is timing set compatible with the 8751H microcontroller programming mode The DS5000 T is placed in its Program Load configuration by simultaneously applying a logic 1 to the RST pin and forcing the PSEN line to a logic 0 leve...

Страница 6: ... the Serial Program Load mode is illustrated in Figure 3 Port pins 2 7 and 2 6 must be either open or pulled high to avoid placing the DS5000 T in a parallel load cycle Although an 11 0592 MHz crystal is shown in Figure 3 a variety of crystal frequencies and loader baud rates are supported shown in Table 2 The serial loader is designed to operate across a 3 wire interface from a standard UART The ...

Страница 7: ...o enable and the Software Security feature of the DS5000 T One may also enter bytes for the MCON register or for the five encryption registers using the Program MCON cycle When using this cycle the absolute register address must be presented at Ports 1 and 2 as in the normal program cycle Port 2 should be 00H The MCON contents can likewise be verified using the Verify MCON cycle When the DS5000 T ...

Страница 8: ...cycle or by explicitly writing to the MCON register and setting MCON 0 to a 1 SERIAL LOADER BAUD RATES FOR DIFFERENT CRYSTAL FREQUENCIES Table 2 BAUD RATE CRYSTAL FREQ MHz 300 1200 2400 9600 19200 57600 14 7456 Y Y Y Y 11 0592 Y Y Y Y Y Y 9 21600 Y Y Y Y 7 37280 Y Y Y Y 5 52960 Y Y Y Y 1 84320 Y Y Y Y ADDITIONAL INFORMATION Refer to the Secure Microcontroller User s Guide for a complete descriptio...

Страница 9: ...put High Voltage RST XTAL1 VIH2 3 5 VCC 0 3 V 1 Output Low Voltage IOL 1 6 mA Ports 1 2 3 VOL1 0 15 0 45 V Output Low Voltage IOL 3 2 mA Ports 0 ALE PSEN VOL2 0 15 0 45 V 1 Output High Voltage IOH 80 µA Ports 1 2 3 VOH1 2 4 4 8 V 1 Output High Voltage IOH 400 µA Ports 0 ALE PSEN VOH2 2 4 4 8 V 1 Input Low Current VIN 0 45V Ports 1 2 3 IIL 50 µA Transition Current 1 to 0 VIN 2 0V Ports 1 2 3 ITL 50...

Страница 10: ... tCLK 8 ns 12 Address Valid to Valid Instr In 12 MHz 16 MHz tAVVI 5tCLK 150 5tCLK 90 ns ns 13 PSEN Low to Address Float tPSLAZ 0 ns 14 RD Pulse Width tRDPW 6tCLK 100 ns 15 WR Pulse Width tWRPW 6tCLK 100 ns 16 RD Low to Valid Data In 12 MHz 16 MHz tRDLDV 5tCLK 165 5tCLK 105 ns ns 17 Data Hold after RD High tRDHDV 0 ns 18 Data Float after RD High tRDHDZ 2tCLK 70 ns 19 ALE Low to Valid Data In 12 MHz...

Страница 11: ...DS5000 T 11 of 19 EXPANDED PROGRAM MEMORY READ CYCLE EXPANDED DATA MEMORY READ CYCLE ...

Страница 12: ...DS5000 T 12 of 19 EXPANDED DATA MEMORY WRITE CYCLE EXTERNAL CLOCK TIMING ...

Страница 13: ...R 20 15 ns ns 31 External Clock Fall Time 12 MHz 16 MHz tCLKF 20 15 ns ns AC CHARACTERISTICS cont d SERIAL PORT TIMING MODE 0 tA 0 C to 70 C VCC 5V 5 PARAMETER SYMBOL MIN MAX UNITS 35 Serial Port Cycle Time tSPCLK 12tCLK µs 36 Output Data Setup to Rising Clock Edge tDOCH 10tCLK 133 ns 37 Output Data Hold after Rising Clock Edge tCHDO 2tCLK 117 ns 38 Clock Rising Edge to Input Data Valid tCHDV 10tC...

Страница 14: ...ERISTICS cont d POWER CYCLING TIMING tA 0 C to 70 C VCC 5V 5 PARAMETER SYMBOL MIN MAX UNITS 32 Slew Rate from VCCmin to 3 3V tF 40 µs 33 Crystal Start up Time tCSU note 5 34 Power on Reset Delay tPOR 21504 tCLK POWER CYCLE TIMING ...

Страница 15: ...46 VPP Setup to PROG Low tVPHPRL 0 47 VPP Hold after PROG Low tPRHVPL 0 48 PROG Width Low tPRW 2400 tCLK 49 Data Output from Address Valid tAVDV 48 1800 tCLK 50 Data Output from P2 7 Low tDVP27L 48 1800 tCLK 51 Data Float after P2 7 High tP27HDZ 0 48 1800 tCLK 52 Delay to Reset PSEN Active after Power On tPORPV 21504 tCLK 53 Reset PSEN Active or Verify Inactive to VPP High tRAVPH 1200 tCLK 54 VPP ...

Страница 16: ...DS5000 T 16 of 19 PARALLEL PROGRAM LOAD TIMING CAPACITANCE test frequency 1MHz tA 25 C PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Output Capacitance CO 10 pF Input Capacitance CI 10 pF ...

Страница 17: ...ls on XTAL1 and 2 2 All port pins disconnected 3 RST 0 volts and EA VCC 4 Part performing endless loop writing to internal memory Idle mode operation is measured using 1 External clock source at XTAL1 XTAL2 floating 2 All port pins disconnected 3 RST 0 volts and EA VCC 4 Part set in IDLE mode by software ...

Страница 18: ...is measured with all output pins disconnected EA PORT0 VCC XTAL2 not connected RST VSS 5 Crystal start up time is the time required to get the mass of the crystal into vibrational motion from the time that power is first applied to the circuit until the first clock pulse is produced by the on chip oscillator The user should check with the crystal vendor for the worst case spec on this time PACKAGE...

Страница 19: ...ductor Corporation DATA SHEET REVISION SUMMARY REVISION DESCRIPTION 072095 to 072496 Corrected Figure 3 to show RST active high Added Data Sheet Revision Summary section 112299 Converted from Interleaf to Word 070706 Page 1 Features Added at Room Temperature to Maintains All Nonvolatile Resources Up to 10 Years in the Absence of VCC bullet Page 2 Ordering Information Removed 8kB parts from list ad...

Страница 20: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Maxim Integrated DS5000 32 16 DS5000FP 16 DS5000T 32 16 DS5000 32 16 DS5000T 32 16 ...

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