Daewoo DVDP485, Руководство по обслуживанию

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CT908
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE CTK CONFIDENTIAL, NO DISCLOSURE
The above information is the exclusive intellectual property of Cheertek Inc. and shall not be disclosed, distributed or reproduced without permission from Cheertek Inc.
Copyright (C) 2003 Cheertek Inc. All Rights Reserved.
COMP AO Compensation pin. A 0.1 uF ceramic capacitor with lead length as short as possible
must be used to decouple power noise.
VREF AO Voltage reference output. Typical value is 0.9V. A 0.1uF ceramic capacitor decouples
this pin to AVSSref
AVD33 (4)
AP
3.3v analog power supply for video DAC, each for one channel
AVSS (4)
AG
Analog ground for video DAC, each for one channel
AVDDref
AP
3.3v analog reference voltage supply for TV encoder DAC
AVSSref
AG
Analog reference ground for TV encoder DAC
VDDDAC
DP
3.3V digital power supply for TV encoder DAC
VSSDAC
DG
Digital ground for TV encoder DAC
GPA4/Hsync I/O General purpose IO bus A bit 4, initial in input state/Horizontal sync output; GPA4 by
default
GPA5/Vsync I/O General purpose IO bus A bit 5, initial in input state/Vertical sync output; GPA5 by
default
4.5 Audio Interface Signals
Pin name Type Description
ACLK I/O Clock for audio sampling rate. Its frequency can be 256fs or 384fs. (fs is audio
sampling rate.) The default is in output state and 384fs .
PCMCLK O Audio PCM clock output
PCMSD0 O PCM Serial Data output for left/right channel or stereo L/R channel
PCMSD1 O PCM Serial Data output for left surround/right surround channel
PCMSD2 O PCM Serial Data output for center/LFE channel
PCMSD3 O PCM Serial Data output for downmixed L/R channel
PCMWS O PCM channel word select output
S/PDIF O IEC-958 self-clocking digital serial output for compressed AC3, compressed DTS,
compressed MPEG or stereo PCM.
ADCCLK O Serial clock output for microphone input.
ADCWS O Word select output for microphone input.
MIC_SD I/O Digital microphone serial PCM input.