Cypress CYTVII-B-E-176-SO, Руководство пользователя

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CYTVII-B-E-1M-176-CPU Evaluation Board User Guide, Document Number. 002-22883 Rev. *C 34
Schematics of CPU Board
Figure A-17. Board to Board Connector- J21A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BOARD TO BOARD CONNECTOR
GND
Place R1 closer to Samtec Connector J22
Place R96,R95,R94,R93
closer to respective
CPU pins
This connects to J38
on the TVII Base board
VBTOB_5V
VBTOB_5V VCC_12V
CPU_BB_VDDA
CPU_BB_VDDIO
VCC_PMIC
CPU_BB_VDDD
BB_LIN0_WAKE {12,19}
BB_LIN1_WAKE {12}
BB_LIN2_WAKE {12}
BB_SPI0_WP {13,19}
BB_SPI0_HOLD {13,19}
BB_CAN0_S {13,19}
BB_CAN1_S {13,16}
CPU_WCO_IN {8}
CPU_WCO_OUT {8}
CPU_ECO_IN {8}
CPU_ECO_OUT {8}
CPU_XRES {6,7,14}
BB_LIN5_WAKE {12,19}
BB_USER_LED8 {12}
BB_USER_LED9 {12}
GPIO_035 {11}
GPIO_036 {11}
GPIO_037 {11}
GPIO_041 {11}
GPIO_032 {11}
GPIO_080 {14}
GPIO_079 {14}
GPIO_033 {11}
GPIO_034 {11}
BB_LIN1_TX {9}
BB_LIN1_RX {9}
BB_LIN1_SLP {9,17}
BB_CAN1_RXD {9,17}
BB_CAN1_TXD {9,17}
BB_LIN0_TX {9}
BB_LIN0_SLP {9}
BB_LIN2_RX {10}
BB_CAN_SPI1_MISO {10}
BB_CAN0_TXD {10,17}
BB_CAN_SPI1_MOSI {10}
BB_CAN_SPI1_CLK {10}
BB_LIN2_TX {10,17}
BB_LIN5_SLP {8,11}
BB_LIN5_RX {11}
BB_LIN5_TX {11}
BB_LIN0_RX {14}
BB_CAN0_RXD {10,17}
GPIO_073 {14}
SCH Title :
Size Document Number
Rev
Date: Sheet o f
CYPRESS SEMICONDUCTOR © 2019
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
6239956
C
CYTVII-B-E-1M-B0-176-CPU-BOARD
A4
18 20
Monday, April 01, 2019
B TO B CONNECTOR- J21A
VJYM
SPPD
R96 0E DNI
R94 0E DNI
R95 0E DNI
R2 0E
R93 0E DNI
J21A
CON_PMC_2X90_F
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
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39
39
41
41
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49
49
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51
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53
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55
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57
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59
61
61
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63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
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42
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50
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68
70
70
72
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80
80
82
82
84
84
86
86
88
88
90
90
181
181
182
182
183
183
184
184
185
185
186
186
R1 0E