Cypress CY6611, Руководство пользователя

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CY6611 System Design
CY6611 EZ-USB HX3PD Evaluation Kit Guide, Document Number: 002-26068 Rev *A 17
Table 3-4. J3 Header Details
Table 3-5 provides more details about the signals terminated on the J4 header. Note that the pin numbers are arranged matching
with the header layout on the CY6611 EVK board.
Table 3-5. J4 Header Details
Pin # Signal Name Description Pin # Signal Name Description
26
EGND Ground
25
EGND Ground 24 23
22 21
20 CC2_DS1 CC2 of DS1 port 19 CC2_DS3 CC2 of DS3 port
18 CC1_DS1 CC1 of DS1 port 17 CC1_DS3 CC1 of DS3 port
16 CC2_US CC2 of US port 15 CC2_DS2 CC2 of DS2 port
14 CC1_US CC1 of US port 13 CC1_DS2 CC1 of DS2 port
12 OCP_DET_P0 OCP Detection for US 11 OVCUR1 Overcurrent detect for DS1
10 EGND Ground 9 VSEL2_GPIO4 Reserved
8 DS_NCP_ENB DS1 PD regulator enable 7 VSEL2_GPIO3 Reserved
6 VBUS_DISCHARGE_US US VBUS Discharge control 5 VBUS_DISCHARGE_DS DS1 VBUS Discharge control
4 US_NCP_ENB
US VBUS Consumer path
control
3 VBUS_C_CTRL_DS
DS1 VBUS Consumer path
control
2 VBUS_P_CTRL_US
US VBUS Provider path
control
1 VBUS_P_CTRL_DS
DS1 VBUS Provider path
control
Pin # Signal Name Description Pin # Signal Name Description
26
EGND Ground
25
EGND Ground
24 23
22 21
20 19
18 VBUS_US Upstream VBUS 17
NC No Connection
16
NC No Connection
15
14 13 I2C_SCL_SPARE
External I2C interface
12
DMC_P32
GPIO for resetting for Hub
Controller 11
I2C_SDA_SPARE
10
DMC_P26
GPIO for controlling DMC FW
LED 9
I2C_MSTR_SCL
I2C to configure the DC-DC
regulators which provide
power on the PD ports (US
and DS1)
8
DMC_P25
Reserved 7
I2C_MSTR_SDA
6
DMC_P24
GPIO for EEPROM Write
Protect enable 5
PD_HUB_INT Reserved
4 VCONN_MON_P1 GPIO of PD Controller 3 I2C_SCL_EC I2C SCL for EC
2 VCONN_MON_P0 GPIO of PD Controller 1 I2C_SDA_EC I2C SDA for EC