Cypress Semiconductor CY8CKIT-062-WiFi-BT, Руководство пользователя, Страница: 77 / 86

PSoC 6 WiFi-BT Pioneer Kit Guide, Doc. # 002-22677 Rev. *B 77
Default configurations in WICED configured; these can be changed if needed.
System Clocks
Name Configuration Used For Notes
Clk_Hf[1]
Input: Clk_path_1 (PLL)
Divider: 1
Frequency: 90 MHz
Clocking audio sub-
system
The WICED audio API assume this clock
is configured for 90 MHz. If not using
WICED audio API feel free to change. If
using WICED audio API do not change.
PLL
Input: IMO
Output: 90 MHz
Clk_HF[1] root See note on Clk_Hf[1]
Peripheral Clocks
Divider Type Divider # Used For Notes
8 Bit 2 CapSense
If not using WICED CapSense API, feel
free to change. If using WICED Cap-
Sense API, do not change.
16 bit 5
WICED STDIO
UART
If not using WICED STDIO UART, feel
free to change, otherwise do not change
GPIO
Port Pin Used For Notes
5 0
WICED STDIO
UART
If not using WICED STDIO UART, feel
free to change, otherwise do not change
5 1
WICED STDIO
UART
If not using WICED STDIO UART, feel
free to change, otherwise do not change
0 3 RED LED Configured for Strong Drive
1 1 Green LED Configured for Strong Drive
11 1 Blue LED Configured for Strong Drive
0 4 SW2 Configured for Pull-Up
8 1 CapSense
If not using WICED CapSense, feel free to
use
8 2 CapSense
If not using WICED CapSense, feel free to
use
8 3 CapSense
If not using WICED CapSense, feel free to
use
8 4 CapSense
If not using WICED CapSense, feel free to
use
8 5 CapSense
If not using WICED CapSense, feel free to
use
8 6 CapSense
If not using WICED CapSense, feel free to
use
8 7 CapSense
If not using WICED CapSense, feel free to
use