background image

Document #: 38-06037  Rev. *D

Revised March 12, 2009

Page 17 of 17

All products and company names mentioned in this document may be the trademarks of their respective holders.

 

CY7C138, CY7C139

© Cypress Semiconductor Corporation, 2005-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress. 

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges. 

Use may be limited by and subject to the applicable Cypress software license agreement. 

Document History Page

Sales, Solutions and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office

closest to you, visit us at 

cypress.com/sales.

Products

PSoC

psoc.cypress.com

Clocks & Buffers

clocks.cypress.com

Wireless

wireless.cypress.com

Memories

memory.cypress.com

Image Sensors

image.cypress.com

PSoC Solutions

General

psoc.cypress.com/solutions

Low Power/Low Voltage

psoc.cypress.com/low-power

Precision Analog 

psoc.cypress.com/precision-analog

LCD Drive

psoc.cypress.com/lcd-drive

CAN 2.0b

psoc.cypress.com/can

USB

psoc.cypress.com/usb

Document Title: CY7C138/CY7C139 4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Document Number: 38-06037

Rev.

ECN No.

Orig. of 

Change

Submission 

Date

Description of Change

**

110180

SZV

09/29/01

Change from Spec number: 38-00536 to 38-06037

*A

122287

RBI

12/27/02

Power up requirements added to Maximum Ratings Information

*B

393403

YIM

See ECN

Added Pb-Free Logo

Added Pb-Free parts to ordering information:

CY7C138-15JXC, CY7C138-25JXC, CY7C139-25JXC

*C

2623658

VKN/PYRS

12/17/08

Added CY7C138-25JXI part

Removed CY7C139 from the Ordering information table

*D

2672737

GNKK

03/12/2009 Updated title in the Document History table

[+] Feedback 

Содержание CY7C138

Страница 1: ...9 bit dual port static RAM or multiple devices can be combined to function as a 16 18 bit or wider master slave dual port static RAM An M S pin is provided for implementing 16 18 bit or wider memory a...

Страница 2: ...leared when right port reads location FFF BUSYL BUSYR Busy Flag M S Master or Slave Select VCC Power GND Ground 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 67 60 59 58 57 56 55 54 53 52 51 50 49 48 3...

Страница 3: ...4 0 mA 0 4 0 4 V VIH 2 2 2 2 V VIL Input LOW Voltage 0 8 0 8 V IIX Input Leakage Current GND VI VCC 10 10 10 10 A IOZ Output Leakage Current Output Disabled GND VO VCC 10 10 10 10 A ICC Operating Curr...

Страница 4: ...uts Disabled Commercial 160 160 mA Industrial 180 180 ISB1 Standby Current Both Ports TTL Levels CEL and CER VIH f fMAX 7 Commercial 30 30 mA Industrial 40 40 ISB2 Standby Current One Port TTL Level C...

Страница 5: ...Max Min Max READ CYCLE tRC Read Cycle Time 15 25 35 55 ns tAA Address to Data Valid 15 25 35 55 ns tOHA Output Hold From Address Change 3 3 3 3 ns tACE CE LOW to Data Valid 15 25 35 55 ns tDOE OE LOW...

Страница 6: ...indow 5 5 5 5 ns Switching Characteristics Over the Operating Range 9 continued Parameter Description 7C138 15 7C139 15 7C138 25 7C139 25 7C138 35 7C139 35 7C138 55 7C139 55 Unit Min Max Min Max Min M...

Страница 7: ...HZCE DATA VALID DATA OUT SEM or CE OE tLZCE tPU ICC ISB tPD VALID tDDD tWDD MATCH MATCH R WR DATA INR DATAOUTL tWC ADDRESSR t PWE VALID t SD t HD ADDRESSL Notes 16 R W is HIGH for read cycle 17 Device...

Страница 8: ...e time of the memory is defined by the overlap of CE or SEM LOW and R W LOW Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH The data input set up and...

Страница 9: ...ntinued tSOP tAA SEM R W OE I O0 VALID ADDRESS VALID ADDRESS tHD DATAIN VALID DATAOUT VALID tOHA A0 A 2 tAW tHA tACE tSOP tSCE tSD tSA tPWE tSWRD tDOE WRITE CYCLE READ CYCLE MATCH tSPS A0L A2L MATCH R...

Страница 10: ...ts at cycle start 29 If tSPS is violated the semaphore will definitely be obtained by one side or the other but there is no guarantee which side will control the semaphore Figure 12 Busy Timing Diagra...

Страница 11: ...n which side BUSY will be asserted Switching Waveforms continued ADDRESS MATCH tPS tBLC tBHC ADDRESS MATCH tPS tBLC tBHC ADDRESSL R BUSYR CEL CER BUSY L CER CEL ADDRESSL R CEL Valid First CER Valid Fi...

Страница 12: ...nds on which enable pin CEL or R WL is asserted last Switching Waveforms continued WRITE FFF tWC tHA READ FFF tRC tINR WRITE FFE tWC READ FFE tINR tRC ADDRESSR CE L R WL INTL OE L ADDRESSR R WR CER IN...

Страница 13: ...g the device as either a master or a slave The BUSY output of the master is connected to the BUSY input of the slave This enables the device to interface to a master device with no external components...

Страница 14: ...X L L FFF H Table 5 Semaphore Operation Example Function I O0 7 8 Left I O0 7 8 Right Status No action 1 1 Semaphore free Left port writes semaphore 0 1 Left port obtains semaphore Right port writes...

Страница 15: ...1 0 0 9 4 0 4 5 5 0 5 5 6 0 NORMALIZED t AA SUPPLY VOLTAGE V NORMALIZED ACCESS TIME vs SUPPLY VOLTAGE 120 140 100 60 40 20 0 0 1 0 2 0 3 0 4 0 OUTPUT SINK CURRENT mA 0 80 OUTPUT VOLTAGE V OUTPUT SINK...

Страница 16: ...ercial CY7C138 25JXC J81 68 Lead Pb Free Plastic Leaded Chip Carrier CY7C138 25JI J81 68 Lead Plastic Leaded Chip Carrier Industrial CY7C138 25JXI J81 68 Lead Pb Free Plastic Leaded Chip Carrier 35 CY...

Страница 17: ...Y OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to...

Отзывы: