Cypress Semiconductor CY7C1334H Скачать руководство пользователя страница 10

Страница: 10 / 13

CY7C1334H

Document #: 38-05678 Rev. *B

Page 10 of 13

Switching Waveforms

Read/Write Timing

[18, 19, 20]

Notes:

18. For this waveform ZZ is tied LOW.
19. When CE is LOW, CE

is LOW, CE

is HIGH and CE

is LOW. When CE is HIGH, CE

is HIGH or CE

is LOW or CE

is HIGH.

20. Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved). Burst operations are optional.

WRITE

D(A1)

CLK

t CYC

CEH

CES

CEN

CENH

CENS

[A:D]

ADV/LD

ADDRESS

Data

In-Out (DQ)

CLZ

D(A1)

D(A2)

D(A5)

Q(A4)

Q(A3)

D(A2+1)

DOH

CHZ

WRITE

D(A2)

BURST
WRITE

D(A2+1)

READ

Q(A3)

READ

Q(A4)

BURST

READ

Q(A4+1)

WRITE

D(A5)

READ

Q(A6)

WRITE

D(A7)

DESELECT

OEV

OELZ

OEHZ

DOH

DON’T CARE

UNDEFINED

Q(A6)

Q(A4+1)

[+] Feedback

Содержание CY7C1334H

Страница 1: ...quent Write Read transitions All synchronous inputs pass through input registers controlled by the rising edge of the clock All data outputs pass through output registers controlled by the rising edge...

Страница 2: ...DQA NC NC DQC DQC VDDQ VSSQ DQC DQC DQC DQC VSSQ VDDQ DQC DQC NC VDD NC VSS DQD DQD VDDQ VSSQ DQD DQD DQD DQD VSSQ VDDQ DQD DQD NC A A CE 1 CE 2 BW D BW C BW B BW A CE 3 V DD V SS CLK WE CEN OE A A 1...

Страница 3: ...ins are tri stated and act as input data pins OE is masked during the data portion of a write sequence during the first clock when emerging from a deselected state when the device has been deselected...

Страница 4: ...sequence and will wrap around when incremented sufficiently A HIGH input on ADV LD will increment the internal burst counter regardless of the state of Chip Enables inputs or WE WE is latched at the b...

Страница 5: ...rst Next X L H X L X L L H Data In D NOP WRITE ABORT Begin Burst None L L L L H X L L H Tri State WRITE ABORT Continue Burst Next X L H X H X L L H Tri State IGNORE CLOCK EDGE Stall Current X L X X X...

Страница 6: ...H Write Bytes D A L L H H L Write Bytes D B L L H L H Write Bytes D B A L L H L L Write Bytes D C L L L H H Write Bytes D C A L L L H L Write Bytes D C B L L L L H Write All Bytes L L L L L ZZ Mode El...

Страница 7: ...for 3 3V I O 2 0 VDD 0 3V V for 2 5V I O 1 7 VDD 0 3V VIL Input LOW Voltage 9 for 3 3V I O 0 3 0 8 V for 2 5V I O 0 3 0 7 IX Input Leakage Current except ZZ and MODE GND VI VDDQ 5 5 A Input Current o...

Страница 8: ...llow standard test methods and procedures for measuring thermal impedance per EIA JESD51 30 32 C W JC Thermal Resistance Junction to Case 6 85 C W AC Test Loads and Waveforms Notes 11 Tested initially...

Страница 9: ...CLK Rise 0 5 0 5 ns tALH ADV LD Hold after CLK Rise 0 5 0 5 ns tWEH GW BW A D Hold after CLK Rise 0 5 0 5 ns tCENH CEN Hold after CLK Rise 0 5 0 5 ns tDH Data Input Hold after CLK Rise 0 5 0 5 ns tCE...

Страница 10: ...ce is determined by the status of the MODE 0 Linear 1 Interleaved Burst operations are optional WRITE D A1 1 2 3 4 5 6 7 8 9 CLK t CYC tCL tCH 10 CE tCEH tCES WE CEN tCENH tCENS BW A D ADV LD tAH tAS...

Страница 11: ...escription table for all possible signal conditions to deselect the device 23 I Os are in High Z when exiting ZZ sleep mode Switching Waveforms continued READ Q A3 4 5 6 7 8 9 10 CLK CE WE CEN BW A D...

Страница 12: ...d in this document are the trademarks of their respective holders Ordering Information Not all of the speed package and temperature ranges are available Please contact your local sales representative...

Страница 13: ...or Corporation on Page 1 from 3901 North First Street to 198 Champion Court Changed Three State to Tri State Modified Input Load to Input Leakage Current except ZZ and MODE in the Electrical Character...

Результаты поиска

Содержание CY7C1334H

Отзывы:

Похожие инструкции для CY7C1334H

Бренды по названию

Популярные бренды

Cypress Semiconductor CY7C1334H, Техническое описание

Результаты поиска

Содержание CY7C1334H

Отзывы:

Похожие инструкции для CY7C1334H

Бренды по названию

Популярные бренды