EXPANSION CHASSIS
PCIe2-2712 PCI Express Gen2 Expansion System User’s Manual
6-5
Revision 1.0, February 2015
Table 6-5. J37 XILINX JTAG Connector
Table 6-6. Jumpers
Pin
Signal
1
GND
2
+3.3V
3
GND
4
TMS
5
GND
6
TCK
7
GND
8
TDO
9
GND
10
TDI
11
GND
12
no connection
13
GND
14
no connection
Reference
Designator
Additional
PCB Label
Function
Notes
J19
“JTAG”
JTAG jumper bypass for slot J1
J20
“JTAG”
JTAG jumper bypass for slot J2
J21
“JTAG”
JTAG jumper bypass for slot J3
J22
“JTAG”
JTAG jumper bypass for slot J4
J23
“JTAG”
JTAG jumper bypass for slot J5
J14
“JTAG”
JTAG jumper bypass for slot J8
J15
“JTAG”
JTAG jumper bypass for slot J9
J16
“JTAG”
JTAG jumper bypass for slot J10
J17
“JTAG”
JTAG jumper bypass for slot J11
J18
“JTAG”
JTAG jumper bypass for slot J12