Curtiss-Wright FHK4-FM4MWB04-00, Справочник по аппаратуре

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REHOSTABLE CMC FPDP INTERFACE
Copyright 2012 11-21 FibreXtreme HW Reference for FPDP Cards
To write to the registers, three clock cycles are needed. The first clock cycle is used to
transfer the address to the CMC card. The second clock cycle has no operation assigned
to it, and is left unused to remain consistent with the read operation. On the third clock,
the data is actually written to the register. Note that all of the registers in the interface are
32-bit registers, and the other 24 bits written to the register on a write operation are the
current read values for those bits. Figure 11-9 shows a single write to the registers.
XX..XX ADDR XXXXXXXX
XXXXXXXX DATA XXXXXXXX
MCLK
/ADS
/WEN
/REN
/SEL
AD[15:8]
AD[7:0]
Figure 11-9 Microcontroller Single Write