3.0 Circuit Description
FIGURE 3.1 210-01 Block Diagram
55 - 300
MHZ CATV
INPUT
CHANNEL
CONVERTER
AUDIO
DEMOD
DATA
DEMOD
DE-
CODER
AUDIO
SWITCH
AUDIO
OUT
SELECT
SWITCHES
EXT AUDIO IN
A1,
Q1 -4
S1 S2
U1,3,5,9
U6
U3,4,7
U10
3.1 Block Diagram Description - 210-01 (Figure 3.1) - The 50 to
300 MHz input (J1) signal first goes to the CATV tuner A1 which
converts the desired input frequency to a 45 MHz IF. Commands to
select the tuner frequency are provided serially from microcontroller
U10. The 45 MHz signal then goes to the bandpass filter consisting of
Q1 - Q4 and associated circuitry. This signal next goes to FM
demodulator consisting of U1,U9 and associated circuitry. U3B and
U5A provide a 12 kHz lowpass filter for the audio signal and U5B is the
output audio amplifier.
The demodulated FM signal from U1, U9 also goes to 21 - 31 kHz
bandpass filter which selects the AFSK data carrier which is sent to the
AFSK demodulator U7. This 9600 b/s ASYNC data goes to
microcontroller U10 which decodes the incoming 9600 kB/s ASYNC
data stream, detects the desired state of the output audio switch U6 and
provides the switch command signal to audio switch U6 based on the
position of the BCD address switches S1, S2. Crystal Y1 determines the
3.6864 MHz clock frequency for the microcontroller U10. VR1 and
VR2 provide reg5 and +9.5 voltages and U8 provides
-9.5 VDC. Unreg12 VDC is connected to J1. LEDs DS1, DS2,
and DS3 provide indications of carrier presence, data activity, and DC
power, respectively.
210-01 manual Rev B
Page 10
2/18/00
Содержание 210-01
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