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CPWR-AN17, Rev -, 05-2016
Copyright © 2016 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
A block diagram of the evaluation board is shown in Figure 2. Besides the two Cree 900V, 120mΩ
(C3M0120090) SiC MOSFETs (Q1 and Q2), there are two onboard isolated gate driver circuits to
drive both Q1 and Q2. There are four power connectors (CON1, CON2, CON3, and CON4) for
connecting to the +DC link, -DC link, and midpoint. There is a 20 pin signal/supply voltage ribbon
cable connector (J10) onboard which carries the logic power, status signals, fault signals, and gate
drive control signals.
Gate
Drive
J10
Q1
Q2
CON1
CON2
CON3,
CON4
Figure 2. Block Diagram
Each gate drive circuit consists of a 2A isolated gate driver chip and a generous 2W isolated DC/DC
converter that can comfortably switch the SiC MOSFETs at up to 3MHz. The driver chip provides
1200V of isolation between the low voltage control side and the high voltage drive side. The
DC/DC converters are sourced with +12V on their inputs. Through a series of jumpers, JM1-JM6
(Figure 4), the gate drivers can each be configured as a low cost uni-polar (+15V/0V) gate drive or as
a high performance bi-polar gate drive (+15V/-3V). The DC/DC converters provide a maximum of
5.2kV of isolation for 60 seconds. The complete board assembly will withstand a 1.5kVAC.rms Hi-pot
test for 60 seconds.
