Copyright
©
2012
congatec
AG
TCEDm10
66/94
3E8h – 3EFh
3F8h – 3FFh
778h – 77Fh
A00h – BFFh
Parts of these ranges are not available if a Super I/O is used on the carrier board. If a Super I/O is not implemented on the carrier board,
then these ranges are available for customer use. If you require additional LPC Bus resources other than those mentioned above, or more
information about this subject, contact congatec technical support for assistance.
8.3
Interrupt Request (IRQ) Lines
Table 30 IRQ Lines in PIC mode
IRQ#
Available
Typical Interrupt Source
Connected to Pin
0
No
Counter 0
Not applicable
1
No
Keyboard
Not applicable
2
No
Cascade Interrupt from Slave PIC
Not applicable
3
Yes
IRQ3 via SERIRQ or PCI BUS INTx
4
Yes
IRQ4 via SERIRQ or PCI BUS INTx
5
Yes
IRQ5 via SERIRQ or PCI BUS INTx
6
Yes
IRQ6 via SERIRQ or PCI BUS INTx
7
No
Reserved for BIOS purposes
8
No
Real-time Clock
Not applicable
9
No
SCI
Not applicable
10
Yes
IRQ10 via SERIRQ or PCI BUS INTx
11
Yes
IRQ11 via SERIRQ or PCI BUS INTx
12
Yes
IRQ12 via SERIRQ or PCI BUS INTx
13
No
Math processor
Not applicable
14
Yes
PCI BUS INTx
15
Yes
PCI BUS INTx
Note
In PIC mode, the PCI bus interrupt lines can be routed to any free IRQ.