CompuLab SBC-FITPC3 Скачать руководство пользователя страница 24

 

 

Connectors 

Revised December 2011 

SBC-FITPC3 

     

24

 

 

 

Table 23      PX2 connector pin-out 

Pin 

Signal Name 

Pin 

Signal Name 

A1 

GND 

B1 

GND 

A2 

RESERVED 

B2 

RESERVED 

A3 

RESERVED 

B3 

PCIE_P2_TX_N 

A4 

FCH_GPIO145_OD 

B4 

FCH_GPIO0 

A5 

RESERVED 

B5 

RESERVED 

A6 

RESERVED 

B6 

RESERVED 

A7 

GND 

B7 

GND 

A8 

NC 

B8 

NC 

A9 

NC 

B9 

NC 

A10 

FCH_GPIO146_OD 

B10 

FCH_GPIO1 

A11 

NC 

B11 

NC 

A12 

NC 

B12 

FCH_GPIO4

 

A13 

GND 

B13 

GND 

A14 

FCH_GPIO144_OD

 

B14 

FCH_GPIO5

 

A15 

FCH_GPIO147_OD

 

B15 

FCH_GPIO6

 

A16 

FCH_GPIO149_OD

 

B16 

FCH_GPIO3

 

A17 

FCH_GPIO129_OD

 

B17 

FCH_GPIO7

 

A18 

FCH_GPIO130_OD

 

B18 

FCH_GPIO8

 

A19 

5V_S5 

B19 

5V_S5 

A20 

FCH_GPIO201

 

B20 

FCH_GPIO9

 

A21 

FCH_GPIO202

 

B21 

FCH_GPIO10

 

A22 

FCH_GPIO150_OD

 

B22 

NC 

A23 

FCH_GPIO204

 

B23 

FCH_GPIO11

 

A24 

FCH_GPIO205

 

B24 

FCH_GPIO12

 

A25 

GND 

B25 

GND 

A26 

NC 

B26 

PCIE_CLK2_P 

A27 

NC 

B27 

PCIE_CLK2_N 

A28 

NC 

B28 

RESERVED

 

A29 

NC 

B29 

RESERVED 

A30 

NC 

B30 

RESERVED 

A31 

NC 

B31 

RESERVED 

A32 

GND 

B32 

GND 

A33 

NC 

B33 

RESERVED 

A34 

NC 

B34 

RESERVED 

A35 

RESERVED 

B35 

RESERVED 

A36 

NC 

B36 

RESERVED 

A37 

NC 

B37 

RESERVED 

A38 

GND 

B38 

RESERVED 

A39 

SMBUS_P2_CLK 

B39 

SMBUS_THRM_CLK 

A40 

SMBUS_P2_DAT 

B40 

SMBUS_THRM_DAT 

A41 

PCIE_CLKREQ# 

B41 

GND 

A42 

FCH_GPIO57 

B42 

RESERVED

 

A43 

FCH_GPIO58 

B43 

RESERVED

 

A44 

GND 

B44 

FCH_PWM0_GPIO197

 

A45 

USB_P13_P 

B45 

RESERVED

 

A46 

USB_P13_N 

B46 

RESERVED

 

A47 

USB_P5_P13_OVC 

B47 

FCH_PWM1_GPIO198

 

A48 

USB_P5_P 

B48 

VCC_12V 

A49 

USB_P5_N 

B49 

VCC_12V 

A50 

GND 

B50 

VCC_12V 

Table 24      PX1, PX2 connector data 

Manufacturer 

Mfg. P/N 

Mating connector  

FCI 

61082-10260[2|6]LF 

61083-10460[2|6]LF 

6.15 

Power Button (SW2) 

The Fit-PC3 power button SW2 controls the system power state. For additional details, please refer to 
section 

 

4.1.3

 

of this document. 

Содержание SBC-FITPC3

Страница 1: ...SBC FITPC3 Reference Guide...

Страница 2: ...of negligence will be accepted by CompuLab its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document CompuLab reserves the right...

Страница 3: ...stem Memory 10 3 2 1 DRAM 10 3 3 Display Subsystem 10 3 3 1 HDMI 10 3 3 2 DisplayPort 10 3 4 Audio Subsystem 11 3 4 1 Analog Audio 12 3 4 2 S PDIF Output 12 3 4 3 S PDIF Input 12 3 5 USB3 0 Subsystem...

Страница 4: ...0 Host Connectors P11A P11B 22 6 8 Gigabit Ethernet Connector P12 22 6 9 eSATA Connectors P16A P16B 22 6 10 SATA Header P3 22 6 11 Front Panel Header P6 22 6 12 Mini PCIe sockets P4 P7 22 6 13 SO DIM...

Страница 5: ...Revised December 2011 SBC FITPC3 5 Table 1 Document Revision Notes Date Description December 2011 First release...

Страница 6: ...nt is part of a set of reference documents necessary to operate and program CompuLab Fit PC3 1 2 Related Documents For additional information not covered in this manual please refer to the documents l...

Страница 7: ...M x2 up to 8GB eSATA SATA III x4 eSATA PCIe x4 USB3 Ctrl USB3 USB3 GbE Ctrl RTL8111 RJ45 USB2 USB2 USB2 x3 USB2 x6 Mini PCIe half size Audio codec ALC888 GPIO x30 SATA III x2 Function and Connectivity...

Страница 8: ...s Notes Audio Stereo line out and stereo line in 7 1 channel S PDIF electrical through 3 5mm jack Network 1000 BaseT Ethernet port activity LEDs RJ 45 connector 802 11b g n Wi Fi 2 antennas 150 Mbit s...

Страница 9: ...supports the following key features Dedicated graphics memory controller High efficiency ring bus memory controller Direct connection to memory 2D Acceleration Highly optimized 128 bit engine capable...

Страница 10: ...ented with the APU HDMI interface HDMI signals are routed to the display output connector P13 The HDMI output supports resolutions of up to 1920 x 1200 at 60Hz NOTE HDMI 1 4a is supported only in the...

Страница 11: ...with 97dB SNR A Weighting ADCs with 90dB SNR A Weighting Ten DAC channels support 16 20 24 bit PCM format for 7 1 sound playback plus 2 channels of independent stereo sound output multiple streaming...

Страница 12: ...put 32 95 dB FSA THD N ADC 84 dB FS DAC 90 dB FS Headphone Amplifier Output 32 80 dB FS Frequency Response ADC 10 0 45 Fs Hz DAC 0 0 45 Fs Hz Power Supply Rejection 50 dB Total Out of Band Noise 28 8k...

Страница 13: ...Gigabit Ethernet interface is implemented with the RTL8111D Realtek Gigabit Ethernet controller The controller is connected to the PCIe interface of the A55E Controller Hub The interface supports the...

Страница 14: ...battery is being re charged whenever Fit PC3 is connected to the main power supply The back up battery will sustain the RTC for up to 6 months with no charging 4 1 3 Power on Logic The Fit PC3 is des...

Страница 15: ...ceive negative PCIe 2 PCIE_P2_TX_P PX1 A38 I O PCIe port 2 transmit positive PCIE_P2_TX_N PX1 A39 I O PCIe port 2 transmit negative PCIE_P2_RX_P PX1 B38 I O PCIe port 2 receive positive PCIE_P2_RX_N P...

Страница 16: ...P3_RX_N PX1 A12 I SATA channel 3 receive negative SATA generic SATA_ACT PX1 B4 OD SATA channel active 5 3 USB Table 7 PCIe Interface Signals Signal Name Pin Type Description Notes USB 4 USB_P4_P P1 A2...

Страница 17: ...Audio Interface Signals Signal Name Pin Type Description Notes HDA_ RST PX1 A16 O HD audio interface reset HDA_SYNC PX1 A17 O HD audio sync signal to codec HDA_CLK PX1 A18 O HD audio interface bit cl...

Страница 18: ...pose I OD GPIO state is not preserved in sleep mode FCH_GPIO130_OD PX2 A18 FCH_GPIO144_OD PX2 A14 FCH_GPIO145_OD PX2 A4 FCH_GPIO146_OD PX2 A10 FCH_GPIO147_OD PX2 A15 FCH_GPIO149_OD PX2 A16 FCH_GPIO150...

Страница 19: ...ate This signal has an internal pull up resistor SLEEP_S3 PX1 B43 O S3 sleep power plane control Assertion of SLP_S3 shuts off power to non critical components when system transitions to S3 S4 or S5 s...

Страница 20: ...out Pin Signal Name 1 VIN_12V 2 GND Table 15 J2 connector data Manufacturer Mfg P N Contact Technology DC 081HS The connector is compatible with the Fit PC3 power supply unit supplied by CompuLab 6 4...

Страница 21: ...PDIF output on P5 and S PDIF input on P9 are accessible with the 3 5mm to RCA adapter cable CompuLab P N 199D10300 available from CompuLab Table 18 P5 connector pin out Pin Signal Name Jack pin out M...

Страница 22: ...SATA Header P3 The SATA header P3 is utilized for the Fit PC3 internal SATA storage The connector is not intended for external usage Table 20 P3 connector pin out Pin Signal Name Pin Signal Name 1 GND...

Страница 23: ..._P7_P A18 HDA_CLK B18 USB_P7_N A19 HDA_SOUT B19 5V_S5 A20 HDA_SIN1 B20 RESERVED A21 HDA_SIN2 B21 RESERVED A22 FCH_GPIO182 B22 LPC_IRQ A23 GND B23 LPC_CLK A24 USB_P4_P B24 LPC_LFRAME A25 USB_P4_N B25 G...

Страница 24: ..._GPIO12 A25 GND B25 GND A26 NC B26 PCIE_CLK2_P A27 NC B27 PCIE_CLK2_N A28 NC B28 RESERVED A29 NC B29 RESERVED A30 NC B30 RESERVED A31 NC B31 RESERVED A32 GND B32 GND A33 NC B33 RESERVED A34 NC B34 RES...

Страница 25: ...HANICAL DRAWINGS The mechanical drawings below are provided for connector location information Full mechanical drawings are available at http www fit pc com Figure 2 Fit PC3 mother board top Figure 3...

Страница 26: ...STOM FACE MODULE DESIGN The fit PC3 has been designed to allow integration of custom FACE Function And Connectivity Extension modules Please refer to the FACE module design guide application note and...

Страница 27: ...mage to the device 9 2 Recommended Operating Conditions Table 26 Recommended Operating Conditions Parameter Min Typ Max Unit Main power supply voltage 10 12 16 V 9 3 DC Electrical Characteristics Tabl...

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