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CORE System Components
Revised December 2011
SBC-FITPC3
13
3.5
USB3.0 Subsystem
The Fit-PC3 features two external USB3.0 ports that are implemented with the Texas Instruments
TUSB7320 host controller. The down-stream ports support SuperSpeed, High-speed and Full-
speed/Low-speed connections.
The TUSB7320 host controller is interfaced with the PCIe interface of the A55E Controller Hub. The
two USB down-stream ports are routed to the dual-stacked USB connector P8.
For additional details, please refer to the TUSB7320 datasheet, available from
http://www.ti.com/
.
3.6
Gigabit Ethernet
The Fit-PC3 Gigabit Ethernet interface is implemented with the RTL8111D Realtek Gigabit Ethernet
controller. The controller is connected to the PCIe interface of the A55E Controller Hub. The
interface supports the following main features:
·
Full compliance with IEEE 802.3 standard
·
Crossover Detection and Auto-Correction
·
Wake-on-LAN and remote wake-up support
·
Auto-negotiation
·
Activity and speed indicator LED controls
Gigabit Ethernet signals are routed to the RJ-45 connector P12.
3.7
Super I/O
The Fit-PC3 utilizes a SMSC SIO1007 Super I/O controller to implement RS232 and CIR interfaces.
The SIO1007 Super I/O controller is interfaced with the A55E controller hub LPC port.
CIR signals are routed to the IR connector U7.
UART signals are routed through the RS232 transceiver to the RS232 connector P2.
Содержание SBC-FITPC3
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