CMT2300A
Rev 1.0 | Page21/46
www.cmostek.com
4. Function Descriptions
CMT2300A is an ultra-low power, high performancetransceiver chip. It supports OOK, (G) FSK and (G) MSK.It is suitable for
applications in the range from 140 to 1020MHz. The product belongs to CMOSTEK NextGenRFTM series. The series includes
transmitters, receivers and transceivers and other complete product lines. CMT2300A block diagramis as shown in the following
figure.
MODEM
Packet Handler
FIFO
AFC LOOP
AGC LOOP
LNA
I LMT
Q LMT
RSSI
ADC
SPI, FIFO
Interface
Registers
D-DIV
LOOP
FILTER
CP
PFD
M-DIV
Radio
Controller
LDOs
POR
Band-
gap
LFOSC
26 Mhz
XO
VCO
SDIO
SCLK
CSB
VDD
GND
RXIP
RXIN
XIN XOUT
IO
Ctrl
FCSB
GPIO 1
GPIO 2
GPIO 3
PA
PA
Figure 4. Functional Block Diagram
In the receiver part, the chip uses LNA+MIXER+ILPLL low-IF architecture to achieve the Sub-GHz wireless
reception function. The chip uses PLL+PA architecture to achieve the Sub-GHz wireless transmitting function.
In the receiver system, the analog circuit mixes the RF signal to IF and converts the signal from analog to digital through the
Limiter module, then outputs I/Q two single bit signals to the digital circuit for (G) FSK demodulation. At the same time, SARADC
will convert the real-time RSSI signal to 8-bit digital signal, and sent them to the digital part for OOK demodulation and other
processing. The digital circuit is responsible for mixing the intermediate frequency to zero frequency (Baseband) and performing
a series of filtering and decision processing, while AFC and AGC control the analog circuit dynamically, finally the 1-bit original
signal is demodulated. After demodulation, the signal will be sent to the decoder to decode and fill in the FIFO, or output to the
PAD directly.
In the transmitter system, the digital circuitry will encode the data and then send them to the modulator (or send them to the
modulator directly without encoding). The modulator will directly control the PLL and PA, modulate the data by (G) FSK or OOK
and transmit them.
The chip provides the SPI communication port. The external MCU can configure the various functions by accessing to the
register, control the main state machine, and access to the FIFO.
4.1 Transmitter
The transmitter is based on direct frequency synthesis technology. The carrier is generated by a low noise fractional-N frequency
synthesizer.
The modulated data is transmitted by an efficient single-ended power amplifier (PA). The output power can be read and written
