CML Microcircuits PE0403, Руководство пользователя

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Evaluation Kit for CMX724x/CMX734x PE0403
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2014 CML Microsystems Plc 23 um0403/1
6.4.2. Check Analogue Path and Set Input Gain
Configure the CMX7240/CMX7340 with the C-BUS register data given in Table 6.
Table 6 CMX7240/CMX7340 Register Settings
– Analogue Path and Input Gain
Write Data
C-BUS Register
Address Name
$5061 $C0 Powerdown Control
$770F $B0 Analogue Gain
$0830 $B1 Input Gain and Signal Routing
$0008 $CF Test Mode
Apply a 1kHz, audio signal to the input, IP3 (J21), at a level of -10dBm (the maximum signal level before
distortion is about +1dBm).
Check the audio signal coming out of the AUDIO OUT pin (TP2). The level should be nominally 6.4dB,
above the level of the input signal.
6.4.3. Check Analogue Path and Set Output Gain
Configure the CMX7240/CMX7340 with the C-BUS register data given in Table 7.
Table 7 CMX7240/CMX7340 Register Settings
– Analogue Path and Output Gain
Write Data
C-BUS Register
Address Name
$A3E1 $C0 Powerdown Control
$650C $B0 Analogue Gain
$0001 $CF Test Mode
Apply a differential 1kHz, audio signal across the inputs, IP1 (J11) and IP2 (J10), at a level of 0dBm
between them.
Check the audio signal coming out of the AUDIO OUT pin (TP2). The level should be
–9.2dBm.
Check the audio signal coming out of the MOD1 pin (J14 or TP18). The level should be -8.0dBm.
Check the audio signal coming out of the MOD2 pin (J17 or TP19). The level should be -10.0dBm.
The MOD1 and MOD2 outputs should have a DC bias level of approximately 1.65 volts.