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CS8900 Technical Reference Manual
active as long as the CS8900 contains
completely received. If ‘n’ words are to
be transferred from the CS8900 to the
system RAM, the DRQ signal remains
active until the (n-1)th word is trans-
ferred. If the DMABurst is set, then the
CS8900 deasserts DRQ signal for 1.3
micro-Seconds after every 28 micro-
Seconds. This option is provided so that
in a system where multiple DMA chan-
nels are operational, the DMA used for
the CS8900 will not take over the sys-
tem bus for long periods of time.
5.2 Selection of IO, Memory and
DMA modes
The CS8900 always responds to all IO-
mode requests. After any reset, the
CS8900 responds to default IO base ad-
dress of 0300h. However, this default
IO address can be changed by writing a
different base address into a EEPROM
connected to the CS8900. After any re-
set, the CS8900 reads the contents of the
EEPROM. If the EEPROM is found
valid, then the information in the
EEPROM is used by the CS8900 to pro-
gram its internal registers.
Memory mode in the CS8900 can be
enabled by programming a proper base-
address value in the Memory Base Ad-
dress register and setting the MemoryE
bit. Enabling of the memory mode can
be done by software or through an
EEPROM connected to the CS8900.
In an IO mode, the CS8900 takes the
minimum space (16 bytes) in the system
address space. For systems where the
address space limited, the IO mode is a
proper choice.
The memory mode is the most direct and
efficient mode of operation for the
CS8900. In the memory mode the
CS8900 occupies 4K of the address
space. The software can access any of
the internal registers of the CS8900 di-
rectly. This reduces accesses to the
CS8900 by half when accessing regis-
ters.
In a system design, even if CS8900 is
used in the memory mode, the designer
should make provisions for accessing
the CS8900 in the IO mode. This dual-
mode access has two advantages.
(a) If an EEPROM is not used in the
Ethernet design, the application can
address the CS8900 in IO mode
(0300h) in order to enable memory
mode.
(b) When the EEPROM is used, the
EEPROM is usually blank when a
board is manufactured. The CS8900
must be accessed in IO mode in or-
der to program the EEPROM.
Use of DMA for receive is efficient in a
multi-tasking environment where the
CPU could be busy servicing several
higher priority tasks before it can service
receive frames off the Ethernet wire.
Since DMA primarily stores the received
frame in the system memory for process-
ing by the CPU at a later time, this
causes extra copying of the receive
frames in the system memory. In many
systems, this extra copy causes lower
bus bandwidth and higher CPU utiliza-
tion.
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Страница 41: ...AN83REV1 41 CS8900 Technical Reference Manual Figure 2 4 7 5V Plane of four layer board ...
Страница 42: ...42 AN83REV1 CS8900 Technical Reference Manual Figure 2 4 8 Ground Plane of four layer board ...
Страница 43: ...AN83REV1 43 CS8900 Technical Reference Manual Figure 2 4 9 Solder side bottom of four layer board ...