CDB89712
3-4
DS502UM2
to their negated states.
3.6.1.2. nBATCHG
When asserted indicates a “no battery” condition, or battery voltage has fallen below the minimum
operating threshold.
3.6.1.3. nPWRFL
When asserted indicates a power fail condition. This condition will force a transition to the Standby
State.
3.6.1.4. nEXTPWR
This signal must be asserted when external power is applied. Placing this switch in the asserted state
will cause a transition to the Standby State. Operating State is resumed when nPWRFL is negated.
(This is a simulation of the fail-safe condition that prevents the CS89712 from operating if the power
supply or battery is inadequate.)
3.7 POWER STATES
The CS89712 supports three power states:
l
Operating
l
Standby
l
Idle
3.7.1
Description Of Supported Power States
Figure 3-2, “CS89712 Operating States,”
details the operating states of the CS89712
microcontroller.
Table 4-11, “Power States of the CS89712's Peripherals by Operating State,”
lists
the status of the CS89712's peripherals in the different operating states.
3.7.1.1. OPERATING
All functions and integrated peripherals of the CS89712 are running.
3.7.1.2. STANDBY
Standby state effectively turns off the CS89712. The 73.728MHz PLL is turned off, there is no
display and the internal peripherals are off. The RTC is active, and all system states and memory
contents are maintained (SDRAM is placed in self-refresh mode).
The RUN signal is driven low.
Standby state is entered when power is applied, or a system reset is activated.
3.7.1.3. IDLE
The Idle state is similar to the Operating state except that the processor clock is turned off (PLL is
still active).
Содержание ARM CDB89712
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