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OG_LMD-400-R-AB_v11e                                                                                                      Circuit Design, Inc.

 

16 

OPERATION GUIDE 

458.3875  

436.6875  

436.6875  

34935 

545

 

55 

458.4000  

436.7000  

436.7000  

34936 

545

 

56 

458.4125  

436.7125  

436.7125  

34937 

545

 

57 

458.4250  

436.7250  

436.7250  

34938 

545

 

58 

458.4375  

436.7375  

436.7375  

34939 

545

 

59 

458.4500  

436.7500  

436.7500  

34940 

545

 

60 

458.4625  

436.7625  

436.7625  

34941 

545

 

61 

458.4750  

436.7750  

436.7750  

34942 

545

 

62 

458.4875  

436.7875  

436.7875  

34943 

545

 

63 

458.5000  

436.8000  

436.8000  

34944 

546 

458.5125  

436.8125  

436.8125  

34945 

546

 

458.5250  

436.8250  

436.8250  

34946 

546

 

458.5375  

436.8375  

436.8375  

34947 

546

 

458.5500  

436.8500  

436.8500  

34948 

546

 

458.5625  

436.8625  

436.8625  

34949 

546

 

458.5750  

436.8750  

436.8750  

34950 

546

 

458.5875  

436.8875  

436.8875  

34951 

546

 

458.6000  

436.9000  

436.9000  

34952 

546

 

458.6125  

436.9125  

436.9125  

34953 

546

 

 

 
Excel  sheets  that  contain  automatic  calculations  for  the  above  equations  can  be  found  on  our  web  site 
(www.circuitdesign.jp).

 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Содержание LMD-400-R

Страница 1: ...multi channel transceiver LMD 400 R 438 442 458 462 MHz Operation Guide Version 1 1 Sep 2011 CIRCUIT DESIGN INC 7557 1 Hotaka Azumino Nagano 399 8303 JAPAN Tel 81 0 263 82 1024 Fax 81 0 263 82 1016 e...

Страница 2: ...PIN DESCRIPTION 6 BLOCK DIAGRAM 8 DIMENSIONS 9 PLL IC CONTROL 10 PLL IC control 10 How to calculate the setting values for the PLL register 11 Method of serial data input to the PLL 12 TIMING CHART 1...

Страница 3: ...high frequency stability in the temperature range from 20 to 60 C The LMD 400 R is the same size and pin compatible with Circuit Design s EN 300220 compliant license exempt transceiver model STD 302N...

Страница 4: ...Item MIN TYP MAX Remarks Oscillation type PLL controlled VCO Frequency stability 20 to 60 C ppm 2 5 2 5 Reference frequency at 25 C TX RX switching time ms 15 20 DI DO Channel step kHz 12 5 Data rate...

Страница 5: ...e DO is established may get longer due to the possible frequency drift caused by operation environment changes especially when switching from TX to RX from RX to TX and changing channels Please make s...

Страница 6: ...D and RXSEL to OPEN or 2 8 V RXSEL I RX select terminal GND RXSEL active To enable the receiver circuits connect RXSEL to GND and TXSEL to OPEN or 2 8 V AF O Analogue output terminal There is DC offse...

Страница 7: ...erminal Lock H 2 8 V Unlock L 0 V RSSI O Received Signal Strength Indicator terminal DO O Data output terminal Interface voltage H 2 8V L 0V DI I Data input terminal Interface voltage H 2 8V to Vcc L...

Страница 8: ...OPERATION GUIDE OG_LMD 400 R AB_v11e Circuit Design Inc 8 BLOCK DIAGRAM LMD 400 R 438 442 MHz 458 462 MHz...

Страница 9: ...OPERATION GUIDE OG_LMD 400 R AB_v11e Circuit Design Inc 9 DIMENSIONS...

Страница 10: ...e frequency These signal lines are connected directly to the PLL IC through a 2 k resistor The interface voltage of LMD 400 R is 2 8 V so the control voltage must be the same LMD 400 R comes equipped...

Страница 11: ...note fcomp fosc R Also this PLL IC operates with the following R N A and M relational expressions R fosc fcomp Equation 5 N INT n M Equation 6 A n M x N Equation 7 INT integer portion of a division As...

Страница 12: ...t this phase The PLL IC which operates as shown in the block diagram in the manual shifts the data to the 19 bit shift register and then transfers it to the respective latch counter register by judgin...

Страница 13: ...ssion occurs If the module is switched to the receive mode when operating in the same channel a new PLL setting is not necessary it can receive data within 5 ms of switching 1 For data transmission if...

Страница 14: ...nged 5 ms 4 40 ms CPU Power on CH Data 5 5 ms 5 ms Check LD signal Check LD signal Normal status Status immediately after pow er comes on Channel change No channel change 4 2 Initialize the port conne...

Страница 15: ...875 34919 545 39 458 2000 436 5000 436 5000 34920 545 40 458 2125 436 5125 436 5125 34921 545 41 458 2250 436 5250 436 5250 34922 545 42 458 2375 436 5375 436 5375 34923 545 43 458 2500 436 5500 436 5...

Страница 16: ...34942 545 62 458 4875 436 7875 436 7875 34943 545 63 458 5000 436 8000 436 8000 34944 546 0 458 5125 436 8125 436 8125 34945 546 1 458 5250 436 8250 436 8250 34946 546 2 458 5375 436 8375 436 8375 349...

Страница 17: ...s the LMD 400 R should be mounted on the circuit boards of the final products and must be enclosed in the cases of the final products No surface of the LMD 400 R should be exposed Conformity assessmen...

Страница 18: ...OG_LMD 400 R AB_v11e Circuit Design Inc 18 OPERATION GUIDE Regulatory compliance information...

Страница 19: ...ipment connected to the radio module Communication performance will be affected by the surrounding environment so communication tests should be carried out before actual use Ensure that the power supp...

Страница 20: ..._LMD 400 R AB_v11e Circuit Design Inc 20 OPERATION GUIDE REVISION HISTORY Version Date Description Remark 0 9 Jan 2010 Preliminary 1 0 May 2010 DOC added specification reviewed 1 1 Sept 2011 DOC updat...

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