5. Circuit Description
This section of the manual contains a description of the circuitry used in the Model
2015A Amplifier/Timing SCA. Components are referred to by “reference designa-
tions” such as Q2, C5, and R10. Throughout the following circuit analysis, refer to the
block diagram and circuit schematics located in the drawings section.
Block Diagram Description
The signal flow is as follows:
The Amplifier
The preamp signal enters either the front panel INPUT BNC (J1) or rear panel INPUT
BNC (J101). The INPUT signal is differentiated (by C1 or C2 and the appropriate am-
plifier input resistance, selected by S2) and pole zeroed by RV1 and R1 or R2. The
differentiated signal is amplified by gain amplifiers K1 and K2. Amplifier K1 is either
inverting or noninverting depending on the INPUT POLARITY switch (S2) position.
The amplified signal is next integrated by the complex pole integrator. The integrated
signal is used to drive the combination OUTPUT amplifier, real pole integrator and dc
restorer. The processed signal is then connected to the SCA and front and rear panel
BNC connectors, J3 and J102, respectively.
The SCA Section
The AMPlifier OUTPUT signal is connected to the LLD and the ULD discriminators
A13 and A9. The LLD DISCriminator reference voltage is generated from +12 volts
by R114, RV4, and RV5, and buffered by A15. The ULD reference voltage is the sum
of the LLD reference and the voltage picked off of RV6. The voltage developed across
RV6 is generated by current source Q27. The ULD reference voltage range is selected
by the rear panel toggle switch S101.
The fast amplified signal (OUTPUT of gain amp K2) is ac coupled to the FAST
DISCriminator, A14. The FAST DISCriminator utilizes the LLD voltage modified by
A16 as its reference. The leading edge information from the FAST DISC (A14) and
LLD DISC (A13) outputs is extracted by the subsequent pulse-former circuits. Jumper
plug J6 selects the FAST DISCriminator of LLD DISCriminator to trigger the timing
monostable A7a. When A7a times out, its subsequent pulse-former triggers mono-
stable A71b. If monostable A7b was enabled, it will generate as SCA OUTPUT pulse.
30
Circuit Description
Содержание 2015A
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