Cambium Networks PTP 820S, Техническое описание, Страница: 130 / 208

Chapter 4: Feature Description Synchronization
•
The worst case PDV is defined as the greatest difference between the minimum and maximum
frame delays. The worst case can occur not just in the radio equipment itself but in every
switch across the network.
• PTP 820S uses 1588v2-compliant Transparent Clock to counter the effects of delay variation.
Transparent Clock measures and adjusts for delay variation, enabling the PTP 820S to
guarantee ultra-low PDV.
•
Transparent Clock has been added to version 2 of the 1588 standard as an improved method of
forming cascaded topologies. Rather than acting as a multi-port ordinary clock, which is what
boundary clocks do, PTP 820S transparent clocks update the newly introduced time-interval
correction field in PTP event messages. This 64-bit field enables switch delay compensation to
a potential accuracy of less than a picosecond.
• The Transparent Clock algorithm forwards and adjusts the messages to reflect the residency
time associated with the Sync and Delay Request messages as they pass through the device.
The delays are inserted in the time-interval correction field.
•
PTP 820S supports End-to-End Transparent Clock, which updates the time-interval correction
field for the delay associated with individual packet transfers. End-to-End Transparent Clock is
the most appropriate option for the Telecom industry.
• As shown in the figure below, PTP 820S measures and updates PTP messages based on both
the radio link delay variation, and the packet processing delay variation that results from the
network processor (switch operation).
Figure 72 Transparent Clock Delay Compensation
6
Radio Link
Delay Variation =
∆x
Packet Processing
Delay Variation =
∆y
1588
Master
Correction Time
1588
Slave
Packet Processing
Delay Variation =
∆y
∆x + 2∆y
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